From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org, damien.lespiau@intel.com
Subject: Re: [PATCH] drm/i915/bdw: Implement WaForceContextSaveRestoreNonCoherent
Date: 29 Jan 2015 08:06:43 -0800 [thread overview]
Message-ID: <84c8a8$j6lvmb@orsmga001.jf.intel.com> (raw)
In-Reply-To: <1422382393-27482-1-git-send-email-damien.lespiau@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5657
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 353/353 353/353
ILK 353/353 353/353
SNB 400/422 400/422
IVB +2 485/487 487/487
BYT 296/296 296/296
HSW +1 507/508 508/508
BDW 401/402 401/402
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
IVB igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance DMESG_WARN(4, M34M21)PASS(5, M4) PASS(1, M4)
IVB igt_gem_storedw_batches_loop_normal DMESG_WARN(4, M34M4)PASS(8, M34M4M21) PASS(1, M4)
HSW igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance DMESG_WARN(1, M40)PASS(13, M40M20) PASS(1, M40)
Note: You need to pay more attention to line start with '*'
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next prev parent reply other threads:[~2015-01-29 16:06 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-27 18:13 [PATCH] drm/i915/bdw: Implement WaForceContextSaveRestoreNonCoherent Damien Lespiau
2015-01-28 9:21 ` Jani Nikula
2015-01-29 11:03 ` Damien Lespiau
2015-01-29 16:06 ` shuang.he [this message]
2015-02-02 13:44 ` Ville Syrjälä
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