From mboxrd@z Thu Jan 1 00:00:00 1970 From: shuang.he@intel.com Subject: Re: [PATCH] drm/i915/skl: Enable eDRAM for gen9 as well Date: 31 Jan 2015 09:30:17 -0800 Message-ID: <84c8a8$j7knla@orsmga001.jf.intel.com> References: <1422535355-4574-1-git-send-email-damien.lespiau@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 07BE06E256 for ; Sat, 31 Jan 2015 09:30:28 -0800 (PST) In-Reply-To: <1422535355-4574-1-git-send-email-damien.lespiau@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: shuang.he@intel.com, ethan.gao@intel.com, intel-gfx@lists.freedesktop.org, damien.lespiau@intel.com List-Id: intel-gfx@lists.freedesktop.org VGVzdGVkLUJ5OiBQUkMgUUEgUFJUUyAoUGF0Y2ggUmVncmVzc2lvbiBUZXN0IFN5c3RlbSBDb250 YWN0OiBzaHVhbmcuaGVAaW50ZWwuY29tKQpUYXNrIGlkOiA1NjgxCi0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS1TdW1tYXJ5LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLQpQbGF0Zm9ybSAgICAgICAgICBEZWx0YSAgICAgICAgICBkcm0taW50ZWwtbmlnaHRs eSAgICAgICAgICBTZXJpZXMgQXBwbGllZApQTlYgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgMzUzLzM1MyAgICAgICAgICAgICAgMzUzLzM1MwpJTEsgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgMjAwLzIwMCAgICAgICAgICAgICAgMjAwLzIwMApTTkIgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgNDAwLzQyMiAgICAgICAgICAgICAgNDAwLzQyMgpJVkIg ICAgICAgICAgICAgICsyICAgICAgICAgICAgICAgICA0ODUvNDg3ICAgICAgICAgICAgICA0ODcv NDg3CkJZVCAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAyOTYvMjk2ICAgICAgICAg ICAgICAyOTYvMjk2CkhTVyAgICAgICAgICAgICAgKzEtMSAgICAgICAgICAgICAgNTA3LzUwOCAg ICAgICAgICAgICAgNTA3LzUwOApCRFcgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg NDAxLzQwMiAgICAgICAgICAgICAgNDAxLzQwMgotLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tRGV0YWlsZWQtLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tClBs YXRmb3JtICBUZXN0ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBkcm0taW50ZWwtbmln aHRseSAgICAgICAgICBTZXJpZXMgQXBwbGllZAogSVZCICBpZ3RfZ2VtX3B3cml0ZV9wcmVhZF9z bm9vcGVkLXB3cml0ZS1ibHQtY3B1X21tYXAtcGVyZm9ybWFuY2UgICAgICBETUVTR19XQVJOKDYs IE0zNE0yMSlQQVNTKDgsIE00TTM0KSAgICAgIFBBU1MoMSwgTTQpCiBJVkIgIGlndF9nZW1fc3Rv cmVkd19iYXRjaGVzX2xvb3Bfbm9ybWFsICAgICAgRE1FU0dfV0FSTig1LCBNMzRNNClQQVNTKDE1 LCBNMzRNNE0yMSkgICAgICBQQVNTKDEsIE00KQogSFNXICBpZ3RfZ2VtX3B3cml0ZV9wcmVhZF9z bm9vcGVkLXB3cml0ZS1ibHQtY3B1X21tYXAtcGVyZm9ybWFuY2UgICAgICBETUVTR19XQVJOKDEs IE00MClQQVNTKDE4LCBNNDBNMjApICAgICAgUEFTUygxLCBNNDApCipIU1cgIGlndF9nZW1fcHdy aXRlX3ByZWFkX3VuY2FjaGVkLWNvcHktcGVyZm9ybWFuY2UgICAgICBQQVNTKDIsIE00MCkgICAg ICBETUVTR19XQVJOKDEsIE00MCkKTm90ZTogWW91IG5lZWQgdG8gcGF5IG1vcmUgYXR0ZW50aW9u IHRvIGxpbmUgc3RhcnQgd2l0aCAnKicKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJl ZWRlc2t0b3Aub3JnCmh0dHA6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5m by9pbnRlbC1nZngK