From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org, damien.lespiau@intel.com
Subject: Re: [PATCH 3/3] drm/i915: Remove unused condition in hsw_power_well_post_enable()
Date: 13 Feb 2015 23:04:01 -0800 [thread overview]
Message-ID: <84c8a8$jds2ve@orsmga001.jf.intel.com> (raw)
In-Reply-To: <1423856278-6175-4-git-send-email-damien.lespiau@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5776
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -2 281/281 279/281
ILK 313/313 313/313
SNB 309/309 309/309
IVB 382/382 382/382
BYT 296/296 296/296
HSW 426/426 426/426
BDW -1 318/318 317/318
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*PNV igt_gen3_render_mixed_blits PASS(1) NRUN(1)
*PNV igt_gen3_render_tiledx_blits PASS(1) CRASH(1)
*BDW igt_gem_gtt_hog PASS(1) DMESG_WARN(1)
Note: You need to pay more attention to line start with '*'
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next prev parent reply other threads:[~2015-02-14 7:04 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-13 19:37 [PATCH 0/3] Restore pipe interrupts registers after power well enabling Damien Lespiau
2015-02-13 19:37 ` [PATCH 1/3] drm/i915/skl: Make gen8_irq_power_well_post_enable() take a pipe mask Damien Lespiau
2015-03-02 18:32 ` Paulo Zanoni
2015-02-13 19:37 ` [PATCH 2/3] drm/i915/skl: Restore pipe interrupt registers after power well enabling Damien Lespiau
2015-03-02 18:37 ` Paulo Zanoni
2015-03-03 8:23 ` Daniel Vetter
2015-02-13 19:37 ` [PATCH 3/3] drm/i915: Remove unused condition in hsw_power_well_post_enable() Damien Lespiau
2015-02-14 7:04 ` shuang.he [this message]
2015-03-02 18:38 ` Paulo Zanoni
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