From mboxrd@z Thu Jan 1 00:00:00 1970 From: shuang.he@intel.com Subject: Re: [PATCH 2/2] drm/i915: Add the last written reg to error state Date: 20 Feb 2015 05:29:30 -0800 Message-ID: <84c8a8$jgfb2a@orsmga001.jf.intel.com> References: <1424410412-24910-2-git-send-email-benjamin.widawsky@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 44A1A6E0F7 for ; Fri, 20 Feb 2015 05:29:32 -0800 (PST) In-Reply-To: <1424410412-24910-2-git-send-email-benjamin.widawsky@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: shuang.he@intel.com, ethan.gao@intel.com, intel-gfx@lists.freedesktop.org, benjamin.widawsky@intel.com List-Id: intel-gfx@lists.freedesktop.org VGVzdGVkLUJ5OiBQUkMgUUEgUFJUUyAoUGF0Y2ggUmVncmVzc2lvbiBUZXN0IFN5c3RlbSBDb250 YWN0OiBzaHVhbmcuaGVAaW50ZWwuY29tKQpUYXNrIGlkOiA1Nzk5Ci0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS1TdW1tYXJ5LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLQpQbGF0Zm9ybSAgICAgICAgICBEZWx0YSAgICAgICAgICBkcm0taW50ZWwtbmlnaHRs eSAgICAgICAgICBTZXJpZXMgQXBwbGllZApQTlYgICAgICAgICAgICAgICAgIC0yICAgICAgICAg ICAgICAyNzcvMjc3ICAgICAgICAgICAgICAyNzUvMjc3CklMSyAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAzMTMvMzEzICAgICAgICAgICAgICAzMTMvMzEzClNOQiAgICAgICAgICAg ICAgICAgLTEgICAgICAgICAgICAgIDMwOS8zMDkgICAgICAgICAgICAgIDMwOC8zMDkKSVZCICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIDM4Mi8zODIgICAgICAgICAgICAgIDM4Mi8z ODIKQllUICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIDI5Ni8yOTYgICAgICAgICAg ICAgIDI5Ni8yOTYKSFNXICAgICAgICAgICAgICAgICAtMSAgICAgICAgICAgICAgNDI1LzQyNSAg ICAgICAgICAgICAgNDI0LzQyNQpCRFcgICAgICAgICAgICAgICAgIC0xICAgICAgICAgICAgICAz MTgvMzE4ICAgICAgICAgICAgICAzMTcvMzE4Ci0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS1EZXRhaWxlZC0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0KUGxh dGZvcm0gIFRlc3QgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIGRybS1pbnRlbC1uaWdo dGx5ICAgICAgICAgIFNlcmllcyBBcHBsaWVkCiBQTlYgIGlndF9nZW1fdXNlcnB0cl9ibGl0c19j b2hlcmVuY3ktc3luYyAgICAgIE5PX1JFU1VMVCgxKUNSQVNIKDUpTlJVTigxKVBBU1MoNikgICAg ICBDUkFTSCgyKQogUE5WICBpZ3RfZ2VtX3VzZXJwdHJfYmxpdHNfY29oZXJlbmN5LXVuc3luYyAg ICAgIENSQVNIKDMpTlJVTigxKVBBU1MoNCkgICAgICBDUkFTSCgyKQoqU05CICBpZ3Rfa21zX3Bs YW5lX3BsYW5lLXBhbm5pbmctdG9wLWxlZnQtcGlwZS1CLXBsYW5lLTIgICAgICBQQVNTKDIpICAg ICAgVElNRU9VVCgxKVBBU1MoMSkKKkhTVyAgaWd0X2dlbV9zdG9yZWR3X2JhdGNoZXNfbG9vcF9z ZWN1cmUtZGlzcGF0Y2ggICAgICBQQVNTKDIpICAgICAgRE1FU0dfV0FSTigxKVBBU1MoMSkKKkJE VyAgaWd0X2dlbV9ndHRfaG9nICAgICAgUEFTUygxNykgICAgICBETUVTR19XQVJOKDEpUEFTUygx KQpOb3RlOiBZb3UgbmVlZCB0byBwYXkgbW9yZSBhdHRlbnRpb24gdG8gbGluZSBzdGFydCB3aXRo ICcqJwpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRl bC1nZnggbWFpbGluZyBsaXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cDov L2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=