From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Praveen Paneri <praveen.paneri@intel.com>,
Chris Wilson <chris@chris-wilson.co.uk>,
intel-gfx@lists.freedesktop.org, Zhe Wang <zhe1.wang@intel.com>,
rodrigo.vivi@intel.com
Subject: Re: [PATCH v4] drm/i915/bxt: Broxton decoupled MMIO
Date: Tue, 15 Nov 2016 14:44:55 +0000 [thread overview]
Message-ID: <84d90b8c-4c0a-0546-bdc7-cabd3384c29e@linux.intel.com> (raw)
In-Reply-To: <582B0B07.1090208@intel.com>
On 15/11/2016 13:17, Praveen Paneri wrote:
> Hi Chris,
>
> On Tuesday 15 November 2016 03:37 PM, Chris Wilson wrote:
>> On Tue, Nov 15, 2016 at 09:36:34AM +0000, Tvrtko Ursulin wrote:
>>>
>>> On 15/11/2016 06:40, Praveen Paneri wrote:
>>>> Decoupled MMIO is an alternative way to access forcewake domain
>>>> registers, which requires less cycles for a single read/write and
>>>> avoids frequent software forcewake.
>>>> This certainly gives advantage over the forcewake as this new
>>>> mechanism “decouples” CPU cycles and allow them to complete even
>>>> when GT is in a CPD (frequency change) or C6 state.
>>>>
>>>> This can co-exist with forcewake and we will continue to use forcewake
>>>> as appropriate. E.g. 64-bit register writes to avoid writing 2 dwords
>>>> separately and land into funny situations.
>>>>
>>>> v2:
>>>> - Moved platform check out of the function and got rid of duplicate
>>>> functions to find out decoupled power domain (Chris)
>>>> - Added a check for forcewake already held and skipped decoupled
>>>> access (Chris)
>>>> - Skipped writing 64 bit registers through decoupled MMIO (Chris)
>>>>
>>>> v3:
>>>> - Improved commit message with more info on decoupled mmio (Tvrtko)
>>>> - Changed decoupled operation to enum and used u32 instead of
>>>> uint_32 data type for register offset (Tvrtko)
>>>> - Moved HAS_DECOUPLED_MMIO to device info (Tvrtko)
>>>> - Added lookup table for converting fw_engine to pd_engine (Tvrtko)
>>>> - Improved __gen9_decoupled_read and __gen9_decoupled_write
>>>> routines (Tvrtko)
>>>>
>>>> v4:
>>>> - Fixed alignment and variable names (Chris)
>>>> - Write GEN9_DECOUPLED_REG0_DW1 register in just one go (Zhe Wang)
>>>>
>>>> Signed-off-by: Zhe Wang <zhe1.wang@intel.com>
>>>> Signed-off-by: Praveen Paneri <praveen.paneri@intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/i915_drv.h | 18 +++++-
>>>> drivers/gpu/drm/i915/i915_pci.c | 1 +
>>>> drivers/gpu/drm/i915/i915_reg.h | 7 +++
>>>> drivers/gpu/drm/i915/intel_uncore.c | 109
>>>> ++++++++++++++++++++++++++++++++++++
>>>> 4 files changed, 134 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>>>> b/drivers/gpu/drm/i915/i915_drv.h
>>>> index 4e7148a..158f05c 100644
>>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>>> @@ -549,6 +549,18 @@ enum forcewake_domains {
>>>> #define FW_REG_READ (1)
>>>> #define FW_REG_WRITE (2)
>>>>
>>>> +enum decoupled_power_domain {
>>>> + GEN9_DECOUPLED_PD_BLITTER = 0,
>>>> + GEN9_DECOUPLED_PD_RENDER,
>>>> + GEN9_DECOUPLED_PD_MEDIA,
>>>> + GEN9_DECOUPLED_PD_ALL
>>>> +};
>>>> +
>>>> +enum decoupled_ops {
>>>> + GEN9_DECOUPLED_OP_WRITE = 0,
>>>> + GEN9_DECOUPLED_OP_READ
>>>> +};
>>>> +
>>>> enum forcewake_domains
>>>> intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
>>>> i915_reg_t reg, unsigned int op);
>>>> @@ -683,7 +695,8 @@ struct intel_csr {
>>>> func(cursor_needs_physical); \
>>>> func(hws_needs_physical); \
>>>> func(overlay_needs_physical); \
>>>> - func(supports_tv)
>>>> + func(supports_tv); \
>>>> + func(has_decoupled_mmio)
>>>>
>>>> struct sseu_dev_info {
>>>> u8 slice_mask;
>>>> @@ -2652,6 +2665,9 @@ struct drm_i915_cmd_table {
>>>> #define GT_FREQUENCY_MULTIPLIER 50
>>>> #define GEN9_FREQ_SCALER 3
>>>>
>>>> +#define HAS_DECOUPLED_MMIO(dev) (INTEL_INFO(dev)->has_decoupled_mmio \
>>>> + && IS_BXT_REVID(dev, BXT_REVID_C0, REVID_FOREVER))
>>>> +
>>>
>>> Looks like I've missed this before, but Would you mind renaming the
>>> dev argument to dev_priv?
>>
>> And whilst you are there, fix up the code to set
>> info->has_decoupled_mmio = false when santizing.
>> -Chris
> but dev_priv->info is declared as const.
Look in intel_device_info_runtime_init for how it is currently done
(mkwrite_device_info).
Regards,
Tvrtko
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next prev parent reply other threads:[~2016-11-15 14:44 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-06 5:24 [PATCH] drm/i915/bxt: Broxton decoupled MMIO Praveen Paneri
2016-09-06 5:51 ` ✗ Fi.CI.BAT: warning for " Patchwork
2016-09-06 6:36 ` [PATCH] " Chris Wilson
2016-09-19 17:05 ` Praveen Paneri
2016-09-19 17:15 ` [PATCH v2] " Praveen Paneri
2016-09-23 9:49 ` Tvrtko Ursulin
2016-09-26 11:08 ` Paneri, Praveen
2016-09-26 20:23 ` Tvrtko Ursulin
2016-10-04 15:46 ` [PATCH v3] " Praveen Paneri
2016-10-04 17:43 ` Vivi, Rodrigo
2016-10-04 19:56 ` Chris Wilson
2016-10-05 3:17 ` Praveen Paneri
2016-10-05 6:24 ` Praveen Paneri
2016-11-15 6:40 ` [PATCH v4] " Praveen Paneri
2016-11-15 9:36 ` Tvrtko Ursulin
2016-11-15 10:07 ` Chris Wilson
2016-11-15 13:17 ` Praveen Paneri
2016-11-15 14:44 ` Tvrtko Ursulin [this message]
2016-11-15 17:19 ` [PATCH v5] " Praveen Paneri
2016-11-16 8:25 ` Tvrtko Ursulin
2016-11-16 9:03 ` Praveen Paneri
2016-11-16 9:08 ` Tvrtko Ursulin
2016-11-16 9:18 ` Chris Wilson
2016-11-15 10:56 ` [PATCH v4] " Praveen Paneri
2016-11-15 10:59 ` Tvrtko Ursulin
2016-10-05 13:50 ` [PATCH v3] " Tvrtko Ursulin
2016-10-10 17:03 ` [PATCH v2] " Carlos Santa
2016-09-19 17:55 ` ✗ Fi.CI.BAT: warning for drm/i915/bxt: Broxton decoupled MMIO (rev2) Patchwork
2016-10-04 16:19 ` ✗ Fi.CI.BAT: warning for drm/i915/bxt: Broxton decoupled MMIO (rev3) Patchwork
2016-11-15 7:16 ` ✓ Fi.CI.BAT: success for drm/i915/bxt: Broxton decoupled MMIO (rev4) Patchwork
2016-11-15 18:15 ` ✓ Fi.CI.BAT: success for drm/i915/bxt: Broxton decoupled MMIO (rev5) Patchwork
2016-11-16 9:38 ` Tvrtko Ursulin
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