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From: "Souza, Jose" <jose.souza@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 04/14] drm/i915: Sipmplify PLANE_STRIDE masking
Date: Wed, 12 Jan 2022 19:50:39 +0000	[thread overview]
Message-ID: <86655bcdda4033eb9f85702e029ecee198be2f2f.camel@intel.com> (raw)
In-Reply-To: <20211201152552.7821-5-ville.syrjala@linux.intel.com>

On Wed, 2021-12-01 at 17:25 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> There's no need to have separate masks for the stride bitfield
> in PLANE_STRIDE for different platforms. All the extra bits
> are hardcoded to zero anyway.
> 
> Also the masks we're using now don't even match the actual hardware
> since the bitfield was only 10 bits on skl/derivatives, only getting
> bumped to 11 bits on glk.
> 
> So let's just use a 12 bit mask for everything.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 +----
>  drivers/gpu/drm/i915/i915_reg.h                    | 3 +--
>  2 files changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 09948922016b..984bb35ecf06 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -2347,10 +2347,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
>  	val = intel_de_read(dev_priv, PLANE_STRIDE(pipe, plane_id));
>  	stride_mult = skl_plane_stride_mult(fb, 0, DRM_MODE_ROTATE_0);
>  
> -	if (DISPLAY_VER(dev_priv) >= 13)
> -		fb->pitches[0] = (val & PLANE_STRIDE_MASK_XELPD) * stride_mult;
> -	else
> -		fb->pitches[0] = (val & PLANE_STRIDE_MASK) * stride_mult;
> +	fb->pitches[0] = (val & PLANE_STRIDE_MASK) * stride_mult;
>  
>  	aligned_height = intel_fb_align_height(fb, 0, fb->height);
>  
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 02d8db03c0bf..6066b1e2763c 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7440,8 +7440,7 @@ enum {
>  	_PIPE(pipe, _PLANE_STRIDE_3_A, _PLANE_STRIDE_3_B)
>  #define PLANE_STRIDE(pipe, plane)	\
>  	_MMIO_PLANE(plane, _PLANE_STRIDE_1(pipe), _PLANE_STRIDE_2(pipe))
> -#define PLANE_STRIDE_MASK		REG_GENMASK(10, 0)
> -#define PLANE_STRIDE_MASK_XELPD		REG_GENMASK(11, 0)
> +#define PLANE_STRIDE_MASK		REG_GENMASK(11, 0)
>  
>  #define _PLANE_POS_1_B				0x7118c
>  #define _PLANE_POS_2_B				0x7128c


  reply	other threads:[~2022-01-12 19:50 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-01 15:25 [Intel-gfx] [PATCH 00/14] drm/i915: Plane register cleanup Ville Syrjala
2021-12-01 15:25 ` [Intel-gfx] [PATCH 01/14] drm/i915: Get rid of the 64bit PLANE_CC_VAL mmio Ville Syrjala
2021-12-01 17:13   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 02/14] drm/i915: Rename plane YUV order bits Ville Syrjala
2021-12-01 17:14   ` Souza, Jose
2021-12-02 11:53     ` Ville Syrjälä
2021-12-01 15:25 ` [Intel-gfx] [PATCH 03/14] drm/i915: Get rid of the "sizes are 0 based" stuff Ville Syrjala
2021-12-01 17:18   ` Souza, Jose
2021-12-02 11:56     ` Ville Syrjälä
2021-12-03 13:40       ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 04/14] drm/i915: Sipmplify PLANE_STRIDE masking Ville Syrjala
2022-01-12 19:50   ` Souza, Jose [this message]
2021-12-01 15:25 ` [Intel-gfx] [PATCH 05/14] drm/i915: Rename PLANE_CUS_CTL Y plane bits Ville Syrjala
2021-12-01 17:17   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 06/14] drm/i915: Use REG_BIT() & co. for universal " Ville Syrjala
2021-12-01 17:26   ` Souza, Jose
2021-12-02 11:57     ` Ville Syrjälä
2022-01-12 19:52       ` Souza, Jose
2021-12-06 15:57   ` kernel test robot
2021-12-01 15:25 ` [Intel-gfx] [PATCH 07/14] drm/i915: Clean up pre-skl primary plane registers Ville Syrjala
2021-12-06 19:22   ` kernel test robot
2022-01-12 20:12   ` Souza, Jose
2022-01-18  0:55     ` Ville Syrjälä
2022-01-18 13:40       ` Souza, Jose
2022-01-18 16:27         ` Ville Syrjälä
2021-12-01 15:25 ` [Intel-gfx] [PATCH 08/14] drm/i915: Clean up ivb+ sprite " Ville Syrjala
2022-01-14 16:26   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 09/14] drm/i915: Clean up vlv/chv " Ville Syrjala
2022-01-14 16:34   ` Souza, Jose
2022-01-18  1:11     ` Ville Syrjälä
2021-12-01 15:25 ` [Intel-gfx] [PATCH 10/14] drm/i915: Clean up g4x+ " Ville Syrjala
2022-01-14 16:38   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 11/14] drm/i915: Clean up cursor registers Ville Syrjala
2022-01-14 16:45   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 12/14] drm/i915: Extract skl_plane_aux_dist() Ville Syrjala
2021-12-01 17:28   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 13/14] drm/i915: Declutter color key register stuff Ville Syrjala
2021-12-01 17:31   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 14/14] drm/i915: Nuke pointless middle men for skl+ plane programming Ville Syrjala
2021-12-01 17:32   ` Souza, Jose
2021-12-01 18:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Plane register cleanup Patchwork
2021-12-01 18:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-12-01 19:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-12-02  1:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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