From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keith Packard Subject: Re: Dear Intel: please document SDVO LVDS option block Date: Mon, 28 Nov 2011 09:28:35 -0800 Message-ID: <86ipm45f7g.fsf@sumi.keithp.com> References: <1319031591.12373.2.camel@atropine> <1319034493.12938.8.camel@atropine> <1319640791.18349.10.camel@atropine> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0555628450==" Return-path: Received: from keithp.com (home.keithp.com [63.227.221.253]) by gabe.freedesktop.org (Postfix) with ESMTP id 68B849E76E for ; Mon, 28 Nov 2011 09:28:21 -0800 (PST) In-Reply-To: <1319640791.18349.10.camel@atropine> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Adam Jackson , 4ernov <4ernov@gmail.com> Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0555628450== Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" --=-=-= Content-Transfer-Encoding: quoted-printable On Wed, 26 Oct 2011 10:53:11 -0400, Adam Jackson wrote: > On Wed, 2011-10-19 at 10:28 -0400, Adam Jackson wrote: >=20 > > I assume the SDVO LVDS options block in the VBT would tell us what bits > > are correct to program here, but intel_bios.h documents only the layout > > of that structure, not its content. Or, we can hope that the SDVO card > > set it up correctly for us (hah). > >=20 > > Intel people, care to shed some light here? >=20 > Just re-raising this. I suspect we can't support SDVO LVDS correctly > without knowing more here. In particular: >=20 > - what "panel type" means in struct bdb_sdvo_lvds_options Which of the four panels in the SDVO info is actually connected. > - what the "misc bits" mean in same LVDS_Misc_Bits_1 Bits [7:6] =3D Reserved Bit 5 =3D Dither =3D 0, off =3D 1, on Bit 4 =3D Panel Fitting =3D 0, Disabled =3D 1, Enabled Bit 3 =3D Panel EDID support - Reserved=20 =3D 0, Disabled =3D 1, Enabled Bit 2 - 0 =3D Panel protection Bit 2 - Monitor Pixel Clk (0 =3D off, 1 =3D on) Bit 1 - Monitor VSync (0 =3D off, 1 =3D on) Bit 0 - Monitor HSync (0 =3D off, 1 =3D on)=09 LVDS_Misc_Bits_2 Bit 7 =3D LVDS SSC Enabled =3D 0, Disabled =3D 1, Enabled Bit6 =3D Disable SSC in Dual Twin Display =3D 0, Not disabled =3D 1, Disabled Bits[5:4] =3D LVDS Channel =3D 02-03, Reserved =3D 01, Dual Channel =3D 00, Single Channel=20=20=20=20=20=20=20 Bits[3:2] =3D Panel Connector =3D 01, OpenLDI =3D 00, SPGW=20=20=20=20=20=20=20 Bits[1:0] =3D Panel color depth =3D 02-03, Reserved =3D 01, 24-bit Color depth =3D 00, 18-bit Color depth=20=20=20=20=20 LVDS_Misc_Bits_3 Bits [7:4] =3D Reserved Bit 3 =3D Panel #4 =3D 0, Single Channel =3D 1, Dual Channel Bit 2 =3D Panel #3 =3D 0, Single Channel =3D 1, Dual Channel Bit 1 =3D Panel #2 =3D 0, Single Channel =3D 1, Dual Channel Bit 0 =3D Panel #1 =3D 0, Single Channel =3D 1, Dual Channel > - whether the BIOS AIM code can be relied on to have set > depth/type/channel correctly or if that's the driver's job That, I'm afraid, I haven't a clue about -- the BIOS does try to light up every display, but it can run out of resources just like Linux, and I don't know what happens when there's not enough pipes to go around. =2D-=20 keith.packard@intel.com --=-=-= Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIVAwUBTtPEwzYtFsjWk68qAQhAIQ/+Mdi+OXJO80+i+34uR0rwAmEBCM6LXwjo DJCWBJtRzd2RboAkO40sDVIYUF3toMUse3/GhbKn5Pb17Bg53S9XtZ3WCPVQm5E0 lXHroruHFsDXPqtu1FJFtB7w1pQpghvGqIoCGQF2FYzts5YxZkCYJxNZwue2+eNb JxOMofvaAjAnN6UjoeWAfAFzViNQpyNaOhW0R92YG1rsdZRSf14PLQ+sDmUE4MDr QB6TQGyxqyJh3E/7kN+Rq7bIB5uQnb2WXzcBUeKmwKebda8LZlsoSgcw+QYqkKZF vXnLjaR+ddl7I4XAMfwHUFPwOwL0FBBJJKens+wTBpqC4j/uyjZXhu0m7iealTNK z3ugQvWyqfSvM8LrDUC2B/GpU58p7UzUJvibsJUZl7x+hflYND6njc0QArXPpM9n xw2wFkVZjZ68WCWCNGzwFtC6gjdnylJAijh+K6+Z8qcOdWUIm83Z5k3D410KWBaz CpBr1jxALfDkcyW6vTsORt5kcialRXb0JkCYo1knfvx7Z6IhkcIIH2FBgwqBDjjv BStFM/4aoRkkcfL4KGIr58lnVhygulO3y5MQppqJSrtIe056tzzq/SHnZbEk9VS8 Y3DMKG6ewFcSZse85UUqkW7Q27v4njsCXN0QpEX4J4y9Vzp5ZMGbROPzHHsxRVjA bVOJjlBwMp8= =z0HT -----END PGP SIGNATURE----- --=-=-=-- --===============0555628450== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0555628450==--