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* [PATCH 1/2] drm/i915: Keep the rings stopped until they have been re-initialized
@ 2017-10-13 13:12 Chris Wilson
  2017-10-13 13:12 ` [PATCH 2/2] drm/i915: Always stop the rings before a missing GPU reset Chris Wilson
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: Chris Wilson @ 2017-10-13 13:12 UTC (permalink / raw)
  To: intel-gfx; +Cc: Mika Kuoppala

Before modifying the ring register (RING_START, HEAD, TAIL, CTL) we
first make sure it is stopped (or else the hw may not resample the
registers). However, we do not need to let the hw restart until after we
have reprogrammed all the rings. This should help prevent situations
where pending operations on the ring may resume (because we are trying
to re-initialize following an unsuccessful GPU hang, i.e. from
i915_gem_unset_wedged).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103260
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 4285f09ff8b8..b2a6cb09c6e7 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -484,11 +484,6 @@ static bool stop_ring(struct intel_engine_cs *engine)
 	I915_WRITE_HEAD(engine, 0);
 	I915_WRITE_TAIL(engine, 0);
 
-	if (INTEL_GEN(dev_priv) > 2) {
-		(void)I915_READ_CTL(engine);
-		I915_WRITE_MODE(engine, _MASKED_BIT_DISABLE(STOP_RING));
-	}
-
 	return (I915_READ_HEAD(engine) & HEAD_ADDR) == 0;
 }
 
@@ -570,6 +565,9 @@ static int init_ring_common(struct intel_engine_cs *engine)
 
 	intel_engine_init_hangcheck(engine);
 
+	if (INTEL_GEN(dev_priv) > 2)
+		I915_WRITE_MODE(engine, _MASKED_BIT_DISABLE(STOP_RING));
+
 out:
 	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 
-- 
2.15.0.rc0

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^ permalink raw reply related	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2017-10-13 19:58 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-10-13 13:12 [PATCH 1/2] drm/i915: Keep the rings stopped until they have been re-initialized Chris Wilson
2017-10-13 13:12 ` [PATCH 2/2] drm/i915: Always stop the rings before a missing GPU reset Chris Wilson
2017-10-13 13:55   ` Mika Kuoppala
2017-10-13 13:49 ` [PATCH 1/2] drm/i915: Keep the rings stopped until they have been re-initialized Mika Kuoppala
2017-10-13 14:57 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2017-10-13 19:53 ` ✗ Fi.CI.IGT: failure " Patchwork
2017-10-13 19:58   ` Chris Wilson

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