From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Check idle to active before processing CSQ
Date: Fri, 07 Aug 2015 11:15:56 +0300 [thread overview]
Message-ID: <871tffy0n7.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20150806160434.GD17734@phenom.ffwll.local>
Daniel Vetter <daniel@ffwll.ch> writes:
> On Thu, Aug 06, 2015 at 05:09:17PM +0300, Mika Kuoppala wrote:
>> If idle to active bit is set, the rest of the fields
>> in CSQ are not valid.
>>
>> Bail out early if this is the case in order to prevent
>> rest of the loop inspecting stale values.
>>
>> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
>
> Same questions here too, what's the impact. E.g. if you only found this by
> bspec/code inspection then it's for -next, but if it's to fix some known
> breakage then it's for -fixes + cc: stable.
>
To this and the masked write one: Both of these were found
when I was trying to find out root cause for skl hangs.
They are both for -next. Both are in the correctness
department vrt bspec and I haven't observed any other
impact.
Point taken on being more verbose.
-Mika
> Thanks, Daniel
>
>> ---
>> drivers/gpu/drm/i915/intel_lrc.c | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
>> index 99bba8e..96218bf 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>> @@ -497,6 +497,9 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
>> status_id = I915_READ(RING_CONTEXT_STATUS_BUF(ring) +
>> (read_pointer % 6) * 8 + 4);
>>
>> + if (status & GEN8_CTX_STATUS_IDLE_ACTIVE)
>> + continue;
>> +
>> if (status & GEN8_CTX_STATUS_PREEMPTED) {
>> if (status & GEN8_CTX_STATUS_LITE_RESTORE) {
>> if (execlists_check_remove_request(ring, status_id))
>> --
>> 2.1.4
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
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next prev parent reply other threads:[~2015-08-07 8:16 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-06 14:09 [PATCH] drm/i915: Check idle to active before processing CSQ Mika Kuoppala
2015-08-06 16:04 ` Daniel Vetter
2015-08-07 8:15 ` Mika Kuoppala [this message]
2015-08-07 11:52 ` Daniel Vetter
2015-08-07 14:30 ` Siluvery, Arun
2015-08-11 10:01 ` Daniel Vetter
2015-08-12 20:52 ` shuang.he
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