From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jani Nikula <jani.nikula@linux.intel.com>
Subject: Re: [PATCH 53/62] drm/i915/bdw: Broadwell has a max
	port clock of 300Mhz on HDMI
Date: Mon, 04 Nov 2013 15:33:20 +0200
Message-ID: <871u2wcmvz.fsf@intel.com>
References: <1383451680-11173-1-git-send-email-benjamin.widawsky@intel.com>
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To: Ben Widawsky <benjamin.widawsky@intel.com>, Intel GFX <intel-gfx@lists.freedesktop.org>
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On Sun, 03 Nov 2013, Ben Widawsky <benjamin.widawsky@intel.com> wrote:
> From: Damien Lespiau <damien.lespiau@intel.com>
>
> Just like HSW.
>
> This means we can scan out a mode with a 300Mhz pixel clock with a depth
> of 24 bits, but only a 200Mhz one with a 36bits depth.
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/intel_hdmi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 51a8336..03f9ca7 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -847,7 +847,7 @@ static int hdmi_portclock_limit(struct intel_hdmi *hdmi)
>  
>  	if (IS_G4X(dev))
>  		return 165000;
> -	else if (IS_HASWELL(dev))
> +	else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8)
>  		return 300000;
>  	else
>  		return 225000;
> -- 
> 1.8.4.2
>
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-- 
Jani Nikula, Intel Open Source Technology Center