Re: [PATCH] drm/i915/bdw: Disable centroid pixel perf optimization

Jesse Barnes
2013-11-05T17:23:51Z

On Mon, 4 Nov 2013 22:52:39 -0800
Ben Widawsky <benjamin.widawsky@intel.com> wrote:

> From: Ben Widawsky <ben@bwidawsk.net>
>
> BDW-A workaround
>
> BDW Bug #1899532
>
> v2: WARN on when not using preliminary HW support
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 050f8c1..98961ef 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4989,6 +4989,9 @@
> #define HSW_ROW_CHICKEN3 0xe49c
> #define HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE (1 << 6)
>
> +#define HALF_SLICE_CHICKEN3 0xe184
> +#define GEN8_CENTROID_PIXEL_OPT_DIS (1<<8)
> +
> #define G4X_AUD_VID_DID (dev_priv->info->display_mmio_offset + 0x62020)
> #define INTEL_AUDIO_DEVCL 0x808629FB
> #define INTEL_AUDIO_DEVBLC 0x80862801
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index e6e12e1..66b5a1c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5286,6 +5286,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> I915_WRITE(WM2_LP_ILK, 0);
> I915_WRITE(WM1_LP_ILK, 0);
>
> + WARN(!i915_preliminary_hw_support,
> + "GEN8_CENTROID_PIXEL_OPT_DIS not be needed for production\n");
> + I915_WRITE(HALF_SLICE_CHICKEN3,
> + _MASKED_BIT_ENABLE(GEN8_CENTROID_PIXEL_OPT_DIS));
> I915_WRITE(GAMTARBMODE, _MASKED_BIT_ENABLE(ARB_MODE_BWGTLB_DISABLE));
>
> /* WaSwitchSolVfFArbitrationPriority */

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>

--
Jesse Barnes, Intel Open Source Technology Center