From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4EA66E75451 for ; Tue, 3 Oct 2023 11:48:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C9AAC10E046; Tue, 3 Oct 2023 11:48:22 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id BDE8510E046 for ; Tue, 3 Oct 2023 11:48:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696333699; x=1727869699; h=from:to:cc:subject:in-reply-to:references:date: message-id:mime-version; bh=U8wy+Nq+c/PyiA3gJx9M8lAUn2fzmzs0SyLu/SrolGo=; b=Au3v/C5g4QLRJkns0+7G6q2NykfsxWOrI8x4c9BmH44bC/Bon1xuJl2M AzAkwTg+gv/r0nj4DAUhywh8R44FHDp9X/6udLZYQ8gTP6RWpEsf5cvne Z3LFyhmU7mS3YhUfN/rG+0t4Rilwox1RvMD/1p/M4lSR+rshorvMdn2zq Yl5mrT3Dr6mIAdfH/X0zIij4L/XxwhyjvL2SlyPDyhQpGm0tZ6dJfPiZl cyQissxV0lRQs3YIm+BAHDX0GB5DdvBbjeKI1IHODhXYRvhOcJ38GkVxZ /Lt/7qAdjsEJekCSb5iC61vdXY35MHuyx5GaGX0Ce3Cc8rmDDGnMAqA6F A==; X-IronPort-AV: E=McAfee;i="6600,9927,10851"; a="447011311" X-IronPort-AV: E=Sophos;i="6.03,197,1694761200"; d="scan'208";a="447011311" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Oct 2023 04:48:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10851"; a="754388667" X-IronPort-AV: E=Sophos;i="6.03,197,1694761200"; d="scan'208";a="754388667" Received: from akorotox-mobl.ger.corp.intel.com (HELO localhost) ([10.252.55.199]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Oct 2023 04:48:17 -0700 From: Jani Nikula To: Jonathan Cavitt , intel-gfx@lists.freedesktop.org In-Reply-To: <20231002172419.1017044-3-jonathan.cavitt@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20231002172419.1017044-1-jonathan.cavitt@intel.com> <20231002172419.1017044-3-jonathan.cavitt@intel.com> Date: Tue, 03 Oct 2023 14:48:15 +0300 Message-ID: <8734ysgc5c.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Subject: Re: [Intel-gfx] [PATCH v3 3/4] drm/i915: Perform TLB invalidation on all GTs during suspend/resume X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: janusz.krzysztofik@intel.com, andi.shyti@intel.com, chris.p.wilson@linux.intel.com, jonathan.cavitt@intel.com, matthew.d.roper@intel.com, nirmoy.das@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, 02 Oct 2023, Jonathan Cavitt wrote: > Consider multi-gt support when cancelling all tlb invalidations on > suspend, and when submitting tlb invalidations on resume. > > Suggested-by: Tvrtko Ursulin > Signed-off-by: Fei Yang > Signed-off-by: Jonathan Cavitt > CC: John Harrison I guess I'm wondering why the top level suspend hook needs to iterate gts instead of some lower level thing. We should aim to reduce gem/gt/display details from the top level. BR, Jani. > --- > drivers/gpu/drm/i915/i915_driver.c | 13 +++++++++---- > 1 file changed, 9 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c > index f5175103ea900..d7655a7b60eda 100644 > --- a/drivers/gpu/drm/i915/i915_driver.c > +++ b/drivers/gpu/drm/i915/i915_driver.c > @@ -1077,6 +1077,8 @@ static int i915_drm_suspend(struct drm_device *dev) > struct drm_i915_private *dev_priv = to_i915(dev); > struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); > pci_power_t opregion_target_state; > + struct intel_gt *gt; > + int i; > > disable_rpm_wakeref_asserts(&dev_priv->runtime_pm); > > @@ -1094,7 +1096,8 @@ static int i915_drm_suspend(struct drm_device *dev) > > intel_runtime_pm_disable_interrupts(dev_priv); > > - wake_up_all_tlb_invalidate(&to_gt(dev_priv)->uc.guc); > + for_each_gt(gt, dev_priv, i) > + wake_up_all_tlb_invalidate(>->uc.guc); > > intel_hpd_cancel_work(dev_priv); > > @@ -1267,9 +1270,11 @@ static int i915_drm_resume(struct drm_device *dev) > > intel_gvt_resume(dev_priv); > > - if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(&to_gt(dev_priv)->uc.guc)) { > - intel_guc_invalidate_tlb_full(&to_gt(dev_priv)->uc.guc); > - intel_guc_invalidate_tlb(&to_gt(dev_priv)->uc.guc); > + for_each_gt(gt, dev_priv, i) { > + if (!INTEL_GUC_SUPPORTS_TLB_INVALIDATION(>->uc.guc)) > + continue; > + intel_guc_invalidate_tlb_full(>->uc.guc); > + intel_guc_invalidate_tlb(>->uc.guc); > } > > enable_rpm_wakeref_asserts(&dev_priv->runtime_pm); -- Jani Nikula, Intel