From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 54170C4332F for ; Mon, 5 Dec 2022 01:40:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AF1B210E093; Mon, 5 Dec 2022 01:40:19 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id A3E8810E093 for ; Mon, 5 Dec 2022 01:40:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670204413; x=1701740413; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=KRW6+R8MsDJdPl3KD2b9sj5X98AGrhPLTiSfJxkxiRc=; b=XbZrWuokFsP7bl/bK9q65FpzP3KI/1Ol50Czg7b5MkTfs5dgeDcU5TIx MItd3ex73QMnecO1whJDSvLBUppi4AJ+JUT3pEDTbuBEr4dt9ly70jXPC 9isGkCbYVkPgwliHD89TVWCMZC7fR5IfcXUxL2t9cb8mxYpAXm5wFGw1B sFYLfVoURaNp0OnBX3v9sYdjPGnwjXd8egFcz26qMIweYzHlZ2PFEIlzL LAKNzPffnAzLY7OT27hSzi0qiCaX551J9gCC9MLAD8JqxmASZM+DuMZk5 uZguTL2vU7fpIOEqP9NsPFlP3O+rMSX8wJ6oqcXb9pu0Pzvqxou6bGBpq Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10551"; a="295942438" X-IronPort-AV: E=Sophos;i="5.96,218,1665471600"; d="scan'208";a="295942438" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2022 17:40:13 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10551"; a="734414106" X-IronPort-AV: E=Sophos;i="5.96,218,1665471600"; d="scan'208";a="734414106" Received: from arushika-mobl2.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.252.132.42]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2022 17:40:12 -0800 Date: Sun, 04 Dec 2022 17:40:12 -0800 Message-ID: <87359u632b.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: "Gupta, Anshuman" In-Reply-To: References: <20221203031454.1280538-1-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH] drm/i915/hwmon: Silence "mailbox access failed" warning in snb_pcode_read X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "intel-gfx@lists.freedesktop.org" , "Vivi, Rodrigo" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Sat, 03 Dec 2022 01:47:06 -0800, Gupta, Anshuman wrote: > Hi Anshuman, > > > hwm_pcode_read_i1 is called during i915 load. This results in the > > > following warning from snb_pcode_read because > > > POWER_SETUP_SUBCOMMAND_READ_I1 is unsupported on DG1/DG2. > > > > > > [drm:snb_pcode_read [i915]] warning: pcode (read from mbox 47c) \ > > > mailbox access failed for snb_pcode_read_p > > > [i915]: -6 > > > > > > The code handles the unsupported command but the warning in dmesg is > > > a red herring which has resulted in a couple of bugs being filed. > > > Therefore silence the warning by avoiding calling snb_pcode_read_p > > > for > > DG1/DG2. > > > > > > Signed-off-by: Ashutosh Dixit > > > --- > > > drivers/gpu/drm/i915/i915_hwmon.c | 4 ++++ > > > 1 file changed, 4 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/i915/i915_hwmon.c > > > b/drivers/gpu/drm/i915/i915_hwmon.c > > > index c588a17f97e98..cca7a4350ec8f 100644 > > > --- a/drivers/gpu/drm/i915/i915_hwmon.c > > > +++ b/drivers/gpu/drm/i915/i915_hwmon.c > > > @@ -293,6 +293,10 @@ static const struct hwmon_channel_info > > > *hwm_gt_info[] = { > > > /* I1 is exposed as power_crit or as curr_crit depending on bit 31 */ > > > static int hwm_pcode_read_i1(struct drm_i915_private *i915, u32 *uval) > > > { > > > + /* Avoid ILLEGAL_SUBCOMMAND "mailbox access failed" warning in > > > snb_pcode_read */ > > > + if (IS_DG1(i915) || IS_DG2(i915)) > > > + return -ENXIO; > > > > AFAIK it is specific to client specific parts, No this is not true, see c8939848f7e4 where it says I1 power is exposed as power1_crit for client products and as curr1_crit for server. Also I know this is available on future client products. So it appears only DG1 and DG2 were an exception because of lack of HW support, this will available in the future for client. Therefore the patch looks correct to me. > > how about declaring a is_client intel_runtime_info flag to distinguish > > between client and server part. That *intel_device_info* will also > > cover any future platform as well. Thanks. -- Ashutosh