From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2CDFBC4332F for ; Thu, 20 Oct 2022 22:57:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B6E8310E331; Thu, 20 Oct 2022 22:57:18 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1AB4010E012; Thu, 20 Oct 2022 22:57:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666306631; x=1697842631; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=3DsXD0LsSO2Pd2oIE5pmBGyY0x+1UYzAr9Nt5NHEmS0=; b=FMAxMvZodZHptKQ3KFCdMxnsDe7bBiG3nYtJFr2bK0oKQrrgwsMETpFq UP5dLxFGnPKyuXcGK1VlWcfiQBDA45mWTZ5b0g5l+vAWfbwaGb/0x4uyZ Fc/0KnP1gjwp4KdNbQjNkJZlwlv+dBa8n4hb99N9KFZny4XxLXb4FepYE B2iQrYYGH6U3/MTSmcOKqG+8yDOLYRGwDuljQb6WRixZtE3MQqPpFAt6+ mIKSe0tPaccdXnDMhe2y8LEPHVljVoyuUxbpv8qUxAlgMFvcWNdkaI2oC GfqL2Q56XYtzMLDTIfFo9/8xqlNqJzxcz3zlvtQnVenjhwh8/fBeZ1qmv w==; X-IronPort-AV: E=McAfee;i="6500,9779,10506"; a="286575735" X-IronPort-AV: E=Sophos;i="5.95,200,1661842800"; d="scan'208";a="286575735" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2022 15:57:10 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10506"; a="581204617" X-IronPort-AV: E=Sophos;i="5.95,200,1661842800"; d="scan'208";a="581204617" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.212.153.148]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2022 15:57:09 -0700 Date: Thu, 20 Oct 2022 15:57:09 -0700 Message-ID: <8735biqf22.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Vinay Belgaumkar In-Reply-To: <20221018183031.33704-1-vinay.belgaumkar@intel.com> References: <20221018183031.33704-1-vinay.belgaumkar@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH v3] drm/i915/slpc: Use platform limits for min/max frequency X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Nirmoy Das Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, 18 Oct 2022 11:30:31 -0700, Vinay Belgaumkar wrote: > Hi Vinay, > diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c b/drivers/gpu/drm/i915/gt/selftest_slpc.c > index 4c6e9257e593..e42bc215e54d 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_slpc.c > +++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c > @@ -234,6 +234,7 @@ static int run_test(struct intel_gt *gt, int test_type) > enum intel_engine_id id; > struct igt_spinner spin; > u32 slpc_min_freq, slpc_max_freq; > + u32 saved_min_freq; > int err = 0; > > if (!intel_uc_uses_guc_slpc(>->uc)) > @@ -252,20 +253,35 @@ static int run_test(struct intel_gt *gt, int test_type) > return -EIO; > } > > - /* > - * FIXME: With efficient frequency enabled, GuC can request > - * frequencies higher than the SLPC max. While this is fixed > - * in GuC, we level set these tests with RPn as min. > - */ > - err = slpc_set_min_freq(slpc, slpc->min_freq); > - if (err) > - return err; > + if (slpc_min_freq == slpc_max_freq) { > + /* Server parts will have min/max clamped to RP0 */ > + if (slpc->min_is_rpmax) { > + err = slpc_set_min_freq(slpc, slpc->min_freq); > + if (err) { > + pr_err("Unable to update min freq on server part"); > + return err; > + } > > - if (slpc->min_freq == slpc->rp0_freq) { > - pr_err("Min/Max are fused to the same value\n"); > - return -EINVAL; > + } else { > + pr_err("Min/Max are fused to the same value\n"); > + return -EINVAL; Sorry but I am not following this else case here. Why are we saying min/max are fused to the same value? In this case we can't do "slpc_set_min_freq(slpc, slpc->min_freq)" ? That is, we can't change SLPC min freq? > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > index fdd895f73f9f..b7cdeec44bd3 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > @@ -263,6 +263,7 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc) > > slpc->max_freq_softlimit = 0; > slpc->min_freq_softlimit = 0; > + slpc->min_is_rpmax = false; > > slpc->boost_freq = 0; > atomic_set(&slpc->num_waiters, 0); > @@ -588,6 +589,32 @@ static int slpc_set_softlimits(struct intel_guc_slpc *slpc) > return 0; > } > > +static bool is_slpc_min_freq_rpmax(struct intel_guc_slpc *slpc) > +{ > + int slpc_min_freq; > + > + if (intel_guc_slpc_get_min_freq(slpc, &slpc_min_freq)) > + return false; I am wondering what happens if the above fails on server? Should we return true or false on server and what are the consequences of returning false on server? Any case I think we should at least put a drm_err or something here just in case this ever fails so we'll know something weird happened. > + > + if (slpc_min_freq == SLPC_MAX_FREQ_MHZ) > + return true; > + else > + return false; > +} > + > +static void update_server_min_softlimit(struct intel_guc_slpc *slpc) > +{ > + /* For server parts, SLPC min will be at RPMax. > + * Use min softlimit to clamp it to RP0 instead. > + */ > + if (is_slpc_min_freq_rpmax(slpc) && > + !slpc->min_freq_softlimit) { > + slpc->min_is_rpmax = true; > + slpc->min_freq_softlimit = slpc->rp0_freq; > + (slpc_to_gt(slpc))->defaults.min_freq = slpc->min_freq_softlimit; > + } > +} > + > static int slpc_use_fused_rp0(struct intel_guc_slpc *slpc) > { > /* Force SLPC to used platform rp0 */ > @@ -647,6 +674,9 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc) > > slpc_get_rp_values(slpc); > > + /* Handle the case where min=max=RPmax */ > + update_server_min_softlimit(slpc); > + > /* Set SLPC max limit to RP0 */ > ret = slpc_use_fused_rp0(slpc); > if (unlikely(ret)) { > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h > index 82a98f78f96c..11975a31c9d0 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h > @@ -9,6 +9,8 @@ > #include "intel_guc_submission.h" > #include "intel_guc_slpc_types.h" > > +#define SLPC_MAX_FREQ_MHZ 4250 This seems to be really a value (255 converted to freq) so seems ok to intepret in MHz. Thanks. -- Ashutosh