Re: [PATCH] drm/i915: respect previous reg values on primary plane disable

[Jani Nikula <jani.nikula@linux.intel.com>]

On Wed, 14 Oct 2015, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Wed, 14 Oct 2015, Kevin Strasser <kevin.strasser@linux.intel.com> wrote:
>> On HSW the crc differs between black and disabled primary planes, causing an
>> assert to fail in the kms_universal_plane test. It seems that things like gamma
>> correction are causing the black primary plane case to result in a brighter
>> color than the disabled primary plane case.
>>
>> Only toggle the enable bit instead of clearing the control register, making the
>> disable path more similar to that of the sprite plane.
>>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89331
>> Testcase: igt/kms_universal_plane
>> Signed-off-by: Kevin Strasser <kevin.strasser@linux.intel.com>
>
> Cc: stable@vger.kernel.org # v3.18
> Fixes: fdd508a64192 ("drm/i915: Call .update_primary_plane in intel_{enable, disable}_primary_hw_plane()")
>
> How about i9xx_update_primary_plane, modified in the same commit above,
> and skylake_update_primary_plane, added in
>
> commit 6156a45602f990cdb140025a3ced96e6695980cf
> Author: Chandra Konduru <chandra.konduru@intel.com>
> Date:   Mon Apr 27 13:48:39 2015 -0700
>
>     drm/i915: skylake primary plane scaling using shared scalers

PS. If these need fixing too, please keep i9xx/ironlake fix in one
commit, and skylake in another, as they're destined to be backported to
different kernels.

BR,
Jani.


>
> BR,
> Jani.
>
>> ---
>>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index cddb0c6..b6164d8e 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -2829,7 +2829,7 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
>>  	int pixel_size;
>>  
>>  	if (!visible || !fb) {
>> -		I915_WRITE(reg, 0);
>> +		I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE);
>>  		I915_WRITE(DSPSURF(plane), 0);
>>  		POSTING_READ(reg);
>>  		return;
>> -- 
>> 1.9.1
>>
>> _______________________________________________
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>
> -- 
> Jani Nikula, Intel Open Source Technology Center

-- 
Jani Nikula, Intel Open Source Technology Center
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