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From: Jani Nikula <jani.nikula@intel.com>
To: Damien Lespiau <damien.lespiau@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/skl: handle all pixel formats in skylake_update_primary_plane()
Date: Mon, 23 Feb 2015 15:15:58 +0200	[thread overview]
Message-ID: <87385wrcoh.fsf@intel.com> (raw)
In-Reply-To: <20150216163846.GB5224@strange.ger.corp.intel.com>

On Mon, 16 Feb 2015, Damien Lespiau <damien.lespiau@intel.com> wrote:
> On Tue, Feb 10, 2015 at 01:15:49PM +0200, Jani Nikula wrote:
>> skylake_update_primary_plane() did not handle all pixel formats returned
>> by skl_format_to_fourcc(). Handle alpha similar to skl_update_plane().
>> 
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89052
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Given the discussion with Ville, it's quite likely we'll default to
> alpha blending for pre-multiplied fbs (for plane supporting alpha), even
> with the blending properties added. In that context, we can provide a
> single, fixed, (but useful) blending mode before we get to implement the
> full thing. So:
>
> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>

Pushed to drm-intel-fixes, thanks for the review.

BR,
Jani.


>
> -- 
> Damien
>
>> ---
>> 
>> This is purely cargo culting to avoid the BUG.
>> ---
>>  drivers/gpu/drm/i915/intel_display.c | 9 +++++++++
>>  1 file changed, 9 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index 3fe95982be93..cede05256d56 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -2751,10 +2751,19 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc,
>>  	case DRM_FORMAT_XRGB8888:
>>  		plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
>>  		break;
>> +	case DRM_FORMAT_ARGB8888:
>> +		plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
>> +		plane_ctl |= PLANE_CTL_ALPHA_SW_PREMULTIPLY;
>> +		break;
>>  	case DRM_FORMAT_XBGR8888:
>>  		plane_ctl |= PLANE_CTL_ORDER_RGBX;
>>  		plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
>>  		break;
>> +	case DRM_FORMAT_ABGR8888:
>> +		plane_ctl |= PLANE_CTL_ORDER_RGBX;
>> +		plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
>> +		plane_ctl |= PLANE_CTL_ALPHA_SW_PREMULTIPLY;
>> +		break;
>>  	case DRM_FORMAT_XRGB2101010:
>>  		plane_ctl |= PLANE_CTL_FORMAT_XRGB_2101010;
>>  		break;
>> -- 
>> 2.1.4
>> 
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-02-23 13:15 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-10 11:15 [PATCH] drm/i915/skl: handle all pixel formats in skylake_update_primary_plane() Jani Nikula
2015-02-10 11:43 ` Ville Syrjälä
2015-02-16 14:22   ` Damien Lespiau
2015-02-16 15:58     ` Ville Syrjälä
2015-02-10 14:06 ` shuang.he
2015-02-16 16:38 ` Damien Lespiau
2015-02-23 13:15   ` Jani Nikula [this message]
2015-02-24 12:28     ` Ville Syrjälä
2015-02-24 12:37       ` Jani Nikula

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