From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH] drm/i915: disable LVDS clock gating on CPT Date: Wed, 02 Oct 2013 11:02:29 +0300 Message-ID: <8738ok3xt6.fsf@intel.com> References: <1380658688-16813-1-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 7CD3EE61A4 for ; Wed, 2 Oct 2013 00:59:58 -0700 (PDT) In-Reply-To: <1380658688-16813-1-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, 01 Oct 2013, Jesse Barnes wrote: > Needed to prevent display corruption in high res panels. Clueless question, could we do this only when we have a high res panel connected? More trouble than it's worth? BR, Jani. > > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/i915_reg.h | 2 ++ > drivers/gpu/drm/i915/intel_pm.c | 4 +++- > 2 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 96fd2ce..cca670a 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -4338,7 +4338,9 @@ > #define FDI_RX_CHICKEN(pipe) _PIPE(pipe, _FDI_RXA_CHICKEN, _FDI_RXB_CHICKEN) > > #define SOUTH_DSPCLK_GATE_D 0xc2020 > +#define PCH_LVDSUNIT_CLOCK_GATE_DISABLE (1<<30) > #define PCH_DPLSUNIT_CLOCK_GATE_DISABLE (1<<29) > +#define PCH_LVDSUNIT2_CLOCK_GATE_DISABLE (1<<14) > #define PCH_LP_PARTITION_LEVEL_DISABLE (1<<12) > > /* CPU: FDI_TX */ > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 698257c..f6765e0 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4791,7 +4791,9 @@ static void cpt_init_clock_gating(struct drm_device *dev) > * gating for the panel power sequencer or it will fail to > * start up when no ports are active. > */ > - I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE); > + I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE | > + PCH_LVDSUNIT_CLOCK_GATE_DISABLE | > + PCH_LVDSUNIT2_CLOCK_GATE_DISABLE); > I915_WRITE(SOUTH_CHICKEN2, I915_READ(SOUTH_CHICKEN2) | > DPLS_EDP_PPS_FIX_DIS); > /* The below fixes the weird display corruption, a few pixels shifted > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center