From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9CC89C433FE for ; Thu, 12 May 2022 18:22:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 12BBD10E4CA; Thu, 12 May 2022 18:22:58 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4A77310E4CA for ; Thu, 12 May 2022 18:22:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652379777; x=1683915777; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=sqSImLorNEUBee9zacuCcUjgKGKv8i3Lk6FZ8ArsLjo=; b=JWBuf52kCKRlvWXgxnTfGFyT8NEcphqQTVetNaxmVHbC0YMEmzl2uJKa YMBzeNIFxZCOrnvr+97ToXRJ9yEJukzds6STjgJlVsNwIuxP4tjp7CAth BUkPbsQ7NGqHLA9raaSnlSDk53OUGxYuQRIScDTd3wLEGNr6gROK4VNXc mXET2ovxKmg5rf4Gpqscww3L/B9XoRDDcI5NgZ30YAUs7LCSM5cMIQG8T +RlOODBVkCORqtmnHZPTQl02Qpbl/UTLcEYukEyfj8kThfIdJ7uphBkD/ eIdhKjCMdXcnhIxYcL8MnIzwlBuRkSYmP/w47LiImDxRRDt6VcgHO0RKY A==; X-IronPort-AV: E=McAfee;i="6400,9594,10345"; a="269771180" X-IronPort-AV: E=Sophos;i="5.91,220,1647327600"; d="scan'208";a="269771180" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2022 11:22:56 -0700 X-IronPort-AV: E=Sophos;i="5.91,220,1647327600"; d="scan'208";a="739815364" Received: from adixit-mobl1.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.209.113.81]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2022 11:22:55 -0700 Date: Thu, 12 May 2022 11:22:54 -0700 Message-ID: <874k1u7gqp.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Jani Nikula In-Reply-To: <87czgjhwb4.fsf@intel.com> References: <4051707182a95ac2ebb754d40b988e976a3e7c61.1652320806.git.ashutosh.dixit@intel.com> <87czgjhwb4.fsf@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH 3/7] drm/i915/pcode: Extend pcode functions for multiple gt's X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, 12 May 2022 03:36:31 -0700, Jani Nikula wrote: > Hi Jani, > On Wed, 11 May 2022, Ashutosh Dixit wrote: > > Each gt contains an independent instance of pcode. Extend pcode functions > > to interface with pcode on different gt's. To avoid creating dependency of > > display functionality on intel_gt, pcode function interfaces are exposed in > > terms of uncore rather than intel_gt. Callers have been converted to pass > > in the appropritate (i915 or intel_gt) uncore to the pcode functions. > > > > v2: Expose pcode functions in terms of uncore rather than gt (Jani/Rodrigo) > > v3: Retain previous function names to eliminate needless #defines (Rodrigo) > > v4: Move out i915_pcode_init() to a separate patch (Tvrtko) > > Remove duplicated drm_err/drm_dbg from intel_pcode_init() (Tvrtko) > > Couple of nitpicks inline, and not insisting on changing. Basically ack > on this from me. Thanks! > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c > > index 0c6b9eb724ae..90a440865037 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c > > +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c > > @@ -138,7 +138,7 @@ static int gen6_drpc(struct seq_file *m) > > } > > > > if (GRAPHICS_VER(i915) <= 7) > > - snb_pcode_read(i915, GEN6_PCODE_READ_RC6VIDS, &rc6vids, NULL); > > + snb_pcode_read(gt->uncore, GEN6_PCODE_READ_RC6VIDS, &rc6vids, NULL); > > Pedantically, I'm wondering if this (and similar places) should first be > i915->uncore, to be replaced with gt->uncore in the next patch. I did think about this and what you are suggesting is definitely possible since we have an i915 variable. But on the other hand these structures are already inside a gt and so 'i915->uncore' is really a 'gt->i915->uncore' so someone might say why don't you just do a 'gt->uncore' which is the same as 'gt->i915->uncore'. But we could do it over two patches as you suggest. > > diff --git a/drivers/gpu/drm/i915/intel_pcode.c b/drivers/gpu/drm/i915/intel_pcode.c > > index ac727546868e..2be700932322 100644 > > --- a/drivers/gpu/drm/i915/intel_pcode.c > > +++ b/drivers/gpu/drm/i915/intel_pcode.c > > @@ -52,14 +52,12 @@ static int gen7_check_mailbox_status(u32 mbox) > > } > > } > > > > -static int __snb_pcode_rw(struct drm_i915_private *i915, u32 mbox, > > +static int __snb_pcode_rw(struct intel_uncore *uncore, u32 mbox, > > u32 *val, u32 *val1, > > int fast_timeout_us, int slow_timeout_ms, > > bool is_read) > > { > > - struct intel_uncore *uncore = &i915->uncore; > > Nitpick, personally, I would probably have just replaced the above with > > struct drm_i915_private *i915 = uncore->i915; > > to minimize the diff. Ditto everywhere. But not a big deal. Agreed. Since you seem to be ok I am tending to not spin these patches again. But if you feel otherwise please let me know and I can do it. Thanks. -- Ashutosh