* [PATCH 1/3] drm/i915/bxt: add support for setting backlight freq from vbt
@ 2015-12-01 8:23 Jani Nikula
2015-12-01 8:23 ` [PATCH 2/3] drm/i915: use default 200 Hz backlight frequency Jani Nikula
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Jani Nikula @ 2015-12-01 8:23 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
The only missing piece is the function to convert frequency to PWM
register value. The PWM is based on 19.2 MHz clock, except for BXT A
step, which is based on CDCLK, and which we ignore.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_panel.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index a24df35e11e7..2d1696386b0d 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1264,6 +1264,14 @@ static void intel_backlight_device_unregister(struct intel_connector *connector)
#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
/*
+ * BXT: PWM clock frequency = 19.2 MHz.
+ */
+static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
+{
+ return KHz(19200) / pwm_freq_hz;
+}
+
+/*
* SPT: This value represents the period of the PWM stream in clock periods
* multiplied by 16 (default increment) or 128 (alternate increment selected in
* SCHICKEN_1 bit 0). PWM clock is 24 MHz.
@@ -1750,6 +1758,7 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
panel->backlight.disable = bxt_disable_backlight;
panel->backlight.set = bxt_set_backlight;
panel->backlight.get = bxt_get_backlight;
+ panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
} else if (HAS_PCH_LPT(dev) || HAS_PCH_SPT(dev)) {
panel->backlight.setup = lpt_setup_backlight;
panel->backlight.enable = lpt_enable_backlight;
--
2.1.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/3] drm/i915: use default 200 Hz backlight frequency
2015-12-01 8:23 [PATCH 1/3] drm/i915/bxt: add support for setting backlight freq from vbt Jani Nikula
@ 2015-12-01 8:23 ` Jani Nikula
2015-12-01 8:23 ` [PATCH 3/3] drm/i915/bxt: backlight clock gating workaround Jani Nikula
2015-12-01 16:58 ` [PATCH 1/3] drm/i915/bxt: add support for setting backlight freq from vbt Imre Deak
2 siblings, 0 replies; 6+ messages in thread
From: Jani Nikula @ 2015-12-01 8:23 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
If the backlight modulation frequency can't be extracted from the
registers or from VBT, use 200 Hz as the default. This may enable
backlight on some machines that previously failed.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_panel.c | 16 +++++++++-------
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 2d1696386b0d..2b25497333de 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1393,14 +1393,18 @@ static u32 get_backlight_max_vbt(struct intel_connector *connector)
u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
u32 pwm;
- if (!pwm_freq_hz) {
- DRM_DEBUG_KMS("backlight frequency not specified in VBT\n");
+ if (!panel->backlight.hz_to_pwm) {
+ DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
return 0;
}
- if (!panel->backlight.hz_to_pwm) {
- DRM_DEBUG_KMS("backlight frequency setting from VBT currently not supported on this platform\n");
- return 0;
+ if (pwm_freq_hz) {
+ DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
+ pwm_freq_hz);
+ } else {
+ pwm_freq_hz = 200;
+ DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
+ pwm_freq_hz);
}
pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
@@ -1409,8 +1413,6 @@ static u32 get_backlight_max_vbt(struct intel_connector *connector)
return 0;
}
- DRM_DEBUG_KMS("backlight frequency %u Hz from VBT\n", pwm_freq_hz);
-
return pwm;
}
--
2.1.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 3/3] drm/i915/bxt: backlight clock gating workaround
2015-12-01 8:23 [PATCH 1/3] drm/i915/bxt: add support for setting backlight freq from vbt Jani Nikula
2015-12-01 8:23 ` [PATCH 2/3] drm/i915: use default 200 Hz backlight frequency Jani Nikula
@ 2015-12-01 8:23 ` Jani Nikula
2015-12-01 17:09 ` Ville Syrjälä
2015-12-01 16:58 ` [PATCH 1/3] drm/i915/bxt: add support for setting backlight freq from vbt Imre Deak
2 siblings, 1 reply; 6+ messages in thread
From: Jani Nikula @ 2015-12-01 8:23 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
From: Imre Deak <imre.deak@intel.com>
Per bspec, "Backlight PWM may stop in the asserted state, causing
backlight to stay fully on. WA: Before disabling PWM, set CLKGATE_DIS_0
0x46530 bit 13 PWM1 Gating Dis (for PWM1) or bit 14 PWM2 Gating Dis (for
PWM2). The bits can remain set without harm." (There's no workaround
name for this.)
This fixes some Broxton backlight issues.
Signed-off-by: Imre Deak <imre.deak@intel.com>
[Jani: cleanup & commit message]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 7 +++++++
drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 487224572022..d87d545e0369 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2973,6 +2973,13 @@ enum skl_disp_power_wells {
#define OGAMC0 _MMIO(0x30024)
/*
+ * GEN9 clock gating regs
+ */
+#define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
+#define PWM2_GATING_DIS (1 << 14)
+#define PWM1_GATING_DIS (1 << 13)
+
+/*
* Display engine regs
*/
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 96f45d7b3e4b..612a8b462294 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -66,6 +66,14 @@ static void bxt_init_clock_gating(struct drm_device *dev)
*/
I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
+
+ /*
+ * Wa: Backlight PWM may stop in the asserted state, causing backlight
+ * to stay fully on.
+ */
+ if (IS_BXT_REVID(dev_priv, BXT_REVID_B0, REVID_FOREVER))
+ I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
+ PWM1_GATING_DIS | PWM2_GATING_DIS);
}
static void i915_pineview_get_mem_freq(struct drm_device *dev)
--
2.1.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH 3/3] drm/i915/bxt: backlight clock gating workaround
2015-12-01 8:23 ` [PATCH 3/3] drm/i915/bxt: backlight clock gating workaround Jani Nikula
@ 2015-12-01 17:09 ` Ville Syrjälä
0 siblings, 0 replies; 6+ messages in thread
From: Ville Syrjälä @ 2015-12-01 17:09 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Tue, Dec 01, 2015 at 10:23:52AM +0200, Jani Nikula wrote:
> From: Imre Deak <imre.deak@intel.com>
>
> Per bspec, "Backlight PWM may stop in the asserted state, causing
> backlight to stay fully on. WA: Before disabling PWM, set CLKGATE_DIS_0
> 0x46530 bit 13 PWM1 Gating Dis (for PWM1) or bit 14 PWM2 Gating Dis (for
> PWM2). The bits can remain set without harm." (There's no workaround
> name for this.)
>
> This fixes some Broxton backlight issues.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> [Jani: cleanup & commit message]
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Nice and easy due to the "without harm" part.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 7 +++++++
> drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
> 2 files changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 487224572022..d87d545e0369 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2973,6 +2973,13 @@ enum skl_disp_power_wells {
> #define OGAMC0 _MMIO(0x30024)
>
> /*
> + * GEN9 clock gating regs
> + */
> +#define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
> +#define PWM2_GATING_DIS (1 << 14)
> +#define PWM1_GATING_DIS (1 << 13)
> +
> +/*
> * Display engine regs
> */
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 96f45d7b3e4b..612a8b462294 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -66,6 +66,14 @@ static void bxt_init_clock_gating(struct drm_device *dev)
> */
> I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
> +
> + /*
> + * Wa: Backlight PWM may stop in the asserted state, causing backlight
> + * to stay fully on.
> + */
> + if (IS_BXT_REVID(dev_priv, BXT_REVID_B0, REVID_FOREVER))
> + I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> + PWM1_GATING_DIS | PWM2_GATING_DIS);
> }
>
> static void i915_pineview_get_mem_freq(struct drm_device *dev)
> --
> 2.1.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/3] drm/i915/bxt: add support for setting backlight freq from vbt
2015-12-01 8:23 [PATCH 1/3] drm/i915/bxt: add support for setting backlight freq from vbt Jani Nikula
2015-12-01 8:23 ` [PATCH 2/3] drm/i915: use default 200 Hz backlight frequency Jani Nikula
2015-12-01 8:23 ` [PATCH 3/3] drm/i915/bxt: backlight clock gating workaround Jani Nikula
@ 2015-12-01 16:58 ` Imre Deak
2015-12-02 8:28 ` Jani Nikula
2 siblings, 1 reply; 6+ messages in thread
From: Imre Deak @ 2015-12-01 16:58 UTC (permalink / raw)
To: Jani Nikula, intel-gfx
On ti, 2015-12-01 at 10:23 +0200, Jani Nikula wrote:
> The only missing piece is the function to convert frequency to PWM
> register value. The PWM is based on 19.2 MHz clock, except for BXT A
> step, which is based on CDCLK, and which we ignore.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
On patch 1 and 2:
Reviewed-by: Imre Deak <imre.deak@intel.com>
For patch 3 we need an another reviewer.
I also tested all three patches and they fix the backlight on BXT,
before it was practically unusable: there was either no backlight at
all or the backlight was flashing rapidly depending on the current
backlight level.
> ---
> drivers/gpu/drm/i915/intel_panel.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_panel.c
> b/drivers/gpu/drm/i915/intel_panel.c
> index a24df35e11e7..2d1696386b0d 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -1264,6 +1264,14 @@ static void
> intel_backlight_device_unregister(struct intel_connector *connector)
> #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
>
> /*
> + * BXT: PWM clock frequency = 19.2 MHz.
> + */
> +static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32
> pwm_freq_hz)
> +{
> + return KHz(19200) / pwm_freq_hz;
> +}
> +
> +/*
> * SPT: This value represents the period of the PWM stream in clock
> periods
> * multiplied by 16 (default increment) or 128 (alternate increment
> selected in
> * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
> @@ -1750,6 +1758,7 @@ intel_panel_init_backlight_funcs(struct
> intel_panel *panel)
> panel->backlight.disable = bxt_disable_backlight;
> panel->backlight.set = bxt_set_backlight;
> panel->backlight.get = bxt_get_backlight;
> + panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
> } else if (HAS_PCH_LPT(dev) || HAS_PCH_SPT(dev)) {
> panel->backlight.setup = lpt_setup_backlight;
> panel->backlight.enable = lpt_enable_backlight;
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH 1/3] drm/i915/bxt: add support for setting backlight freq from vbt
2015-12-01 16:58 ` [PATCH 1/3] drm/i915/bxt: add support for setting backlight freq from vbt Imre Deak
@ 2015-12-02 8:28 ` Jani Nikula
0 siblings, 0 replies; 6+ messages in thread
From: Jani Nikula @ 2015-12-02 8:28 UTC (permalink / raw)
To: imre.deak, intel-gfx
On Tue, 01 Dec 2015, Imre Deak <imre.deak@intel.com> wrote:
> On ti, 2015-12-01 at 10:23 +0200, Jani Nikula wrote:
>> The only missing piece is the function to convert frequency to PWM
>> register value. The PWM is based on 19.2 MHz clock, except for BXT A
>> step, which is based on CDCLK, and which we ignore.
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> On patch 1 and 2:
> Reviewed-by: Imre Deak <imre.deak@intel.com>
>
> For patch 3 we need an another reviewer.
>
> I also tested all three patches and they fix the backlight on BXT,
> before it was practically unusable: there was either no backlight at
> all or the backlight was flashing rapidly depending on the current
> backlight level.
Pushed all three to drm-intel-next-queued, thanks for the reviews, and
patch 3.
BR,
Jani.
>
>> ---
>> drivers/gpu/drm/i915/intel_panel.c | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_panel.c
>> b/drivers/gpu/drm/i915/intel_panel.c
>> index a24df35e11e7..2d1696386b0d 100644
>> --- a/drivers/gpu/drm/i915/intel_panel.c
>> +++ b/drivers/gpu/drm/i915/intel_panel.c
>> @@ -1264,6 +1264,14 @@ static void
>> intel_backlight_device_unregister(struct intel_connector *connector)
>> #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
>>
>> /*
>> + * BXT: PWM clock frequency = 19.2 MHz.
>> + */
>> +static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32
>> pwm_freq_hz)
>> +{
>> + return KHz(19200) / pwm_freq_hz;
>> +}
>> +
>> +/*
>> * SPT: This value represents the period of the PWM stream in clock
>> periods
>> * multiplied by 16 (default increment) or 128 (alternate increment
>> selected in
>> * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
>> @@ -1750,6 +1758,7 @@ intel_panel_init_backlight_funcs(struct
>> intel_panel *panel)
>> panel->backlight.disable = bxt_disable_backlight;
>> panel->backlight.set = bxt_set_backlight;
>> panel->backlight.get = bxt_get_backlight;
>> + panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
>> } else if (HAS_PCH_LPT(dev) || HAS_PCH_SPT(dev)) {
>> panel->backlight.setup = lpt_setup_backlight;
>> panel->backlight.enable = lpt_enable_backlight;
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2015-12-02 8:24 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-12-01 8:23 [PATCH 1/3] drm/i915/bxt: add support for setting backlight freq from vbt Jani Nikula
2015-12-01 8:23 ` [PATCH 2/3] drm/i915: use default 200 Hz backlight frequency Jani Nikula
2015-12-01 8:23 ` [PATCH 3/3] drm/i915/bxt: backlight clock gating workaround Jani Nikula
2015-12-01 17:09 ` Ville Syrjälä
2015-12-01 16:58 ` [PATCH 1/3] drm/i915/bxt: add support for setting backlight freq from vbt Imre Deak
2015-12-02 8:28 ` Jani Nikula
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox