From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH] drm/i915/bdw: WaProgramL3SqcReg1Default
Date: Wed, 01 Oct 2014 16:46:50 +0300 [thread overview]
Message-ID: <874mvnucl1.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <1412089877-3998-1-git-send-email-rodrigo.vivi@intel.com>
Rodrigo Vivi <rodrigo.vivi@intel.com> writes:
> Program the default initial value of the L3SqcReg1 on BDW for performance
>
> v2: Default confirmed and using intel_ring_emit_wa as Mika pointed out.
>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_ringbuffer.c | 5 ++++-
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 36a847a..33143cc 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4972,6 +4972,9 @@ enum punit_power_well {
> #define GEN7_L3SQCREG1 0xB010
> #define VLV_B0_WA_L3SQCREG1_VALUE 0x00D30000
>
> +#define GEN8_L3SQCREG1 0xB100
> +#define BDW_WA_L3SQCREG1_DEFAULT 0x00610000
> +
This is the default value after reset. I have experimented with other
values and nothing improves above noise level. Further, my suggestion to
using 0x00810000 will cause a gpu hang...so there is dragons here.
As you are writing the same default value that is already in register,
and there is no indication that we should refresh anything, I would
say this patch is not needed until someone comes along and shows
something better than what the default is.
Thanks,
-Mika
> #define GEN7_L3CNTLREG1 0xB01C
> #define GEN7_WA_FOR_GEN7_L3_CONTROL 0x3C47FF8C
> #define GEN7_L3AGDIS (1<<19)
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 816a692..a37675d 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -707,7 +707,7 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
> * update the number of dwords required based on the
> * actual number of workarounds applied
> */
> - ret = intel_ring_begin(ring, 18);
> + ret = intel_ring_begin(ring, 21);
> if (ret)
> return ret;
>
> @@ -751,6 +751,9 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
> intel_ring_emit_wa(ring, GEN7_GT_MODE,
> GEN6_WIZ_HASHING_MASK | GEN6_WIZ_HASHING_16x4);
>
> + /* WaProgramL3SqcReg1Default:bdw */
> + intel_ring_emit_wa(ring, GEN8_L3SQCREG1, BDW_WA_L3SQCREG1_DEFAULT);
> +
> intel_ring_advance(ring);
>
> DRM_DEBUG_DRIVER("Number of Workarounds applied: %d\n",
> --
> 1.9.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2014-10-01 13:47 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-20 0:16 [PATCH 1/5] drm/i915: Add IS_BDW_GT3 macro Rodrigo Vivi
2014-09-20 0:16 ` [PATCH 2/5] drm/i915/bdw: WaDisableFenceDestinationToSLM Rodrigo Vivi
2014-09-25 12:37 ` Mika Kuoppala
2014-09-29 12:32 ` Daniel Vetter
2014-09-29 12:49 ` Daniel Vetter
2014-09-30 15:02 ` Mika Kuoppala
2014-09-30 16:27 ` Daniel Vetter
2014-09-20 0:16 ` [PATCH 3/5] drm/i915/bdw: WaProgramL3SqcReg1Default Rodrigo Vivi
2014-09-26 12:03 ` Mika Kuoppala
2014-09-26 18:32 ` Rodrigo Vivi
2014-09-26 19:06 ` Ville Syrjälä
2014-09-30 15:11 ` [PATCH] " Rodrigo Vivi
2014-10-01 13:46 ` Mika Kuoppala [this message]
2014-09-20 0:16 ` [PATCH 4/5] drm/i915: Let number of workarounds more clear Rodrigo Vivi
2014-09-24 22:44 ` [PATCH] " Rodrigo Vivi
2014-09-26 12:22 ` [PATCH 4/5] " Mika Kuoppala
2014-09-26 12:56 ` Jani Nikula
2014-09-26 12:58 ` Chris Wilson
2014-09-26 13:02 ` Damien Lespiau
2014-09-26 14:16 ` Mika Kuoppala
2014-09-26 14:56 ` Chris Wilson
2014-09-30 22:13 ` Rodrigo Vivi
2014-09-20 0:16 ` [PATCH 5/5] drm/i915/bdw: Remove BDW preproduction W/As until C stepping Rodrigo Vivi
2014-09-24 22:46 ` [PATCH] " Rodrigo Vivi
2014-09-30 22:14 ` Rodrigo Vivi
2014-10-01 14:11 ` Mika Kuoppala
2014-10-09 14:11 ` Rodrigo Vivi
2014-10-19 12:14 ` Daniel Vetter
2014-09-29 19:58 ` [PATCH 1/5] drm/i915: Add IS_BDW_GT3 macro Jesse Barnes
-- strict thread matches above, loose matches on Subject: below --
2015-03-31 23:03 [PATCH] drm/i915/bdw: WaProgramL3SqcReg1Default Rodrigo Vivi
2015-04-01 5:52 ` shuang.he
2015-04-01 7:49 ` Jani Nikula
2015-04-01 8:31 ` Ville Syrjälä
2015-04-01 14:49 ` Vivi, Rodrigo
2015-04-01 15:41 ` Ville Syrjälä
2015-04-07 8:26 ` Daniel Vetter
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