From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mika Kuoppala Subject: Re: [PATCH] drm/i915/skl: Use correct use counters for force wakes Date: Thu, 25 Sep 2014 15:05:27 +0300 Message-ID: <874mvvhpmg.fsf@gaia.fi.intel.com> References: <1411640220-32696-1-git-send-email-tvrtko.ursulin@linux.intel.com> <20140925102916.GC15638@strange.amr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 3DE976E6DF for ; Thu, 25 Sep 2014 05:05:31 -0700 (PDT) In-Reply-To: <20140925102916.GC15638@strange.amr.corp.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Damien Lespiau , Tvrtko Ursulin Cc: Intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org Damien Lespiau writes: > On Thu, Sep 25, 2014 at 11:17:00AM +0100, Tvrtko Ursulin wrote: >> From: Tvrtko Ursulin >> >> Write and reads following the block changed use engine specific use counters >> and unless that is matched here force wake use counting goes bad. Same >> force wake is attempted to be taken twice which leads to at least time outs. >> >> Signed-off-by: Tvrtko Ursulin > > Is it worth a v2 to have gen >= 9 here? I think we should have gen >= 8 here. Shadowed ELSP's seems not to work on gen8. And the posting read will need fw anyways. Assuming the shadowing works on skl and we can get rid of the posting read, we could run this part without taking forcewake. -Mika > -- > Damien > >> --- >> drivers/gpu/drm/i915/intel_lrc.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c >> index 3048d78..4b33767 100644 >> --- a/drivers/gpu/drm/i915/intel_lrc.c >> +++ b/drivers/gpu/drm/i915/intel_lrc.c >> @@ -301,7 +301,7 @@ static void execlists_elsp_write(struct intel_engine_cs *ring, >> * Instead, we do the runtime_pm_get/put when creating/destroying requests. >> */ >> spin_lock_irqsave(&dev_priv->uncore.lock, flags); >> - if (IS_CHERRYVIEW(dev_priv->dev)) { >> + if (IS_CHERRYVIEW(dev_priv->dev) || IS_GEN9(dev_priv->dev)) { >> if (dev_priv->uncore.fw_rendercount++ == 0) >> dev_priv->uncore.funcs.force_wake_get(dev_priv, >> FORCEWAKE_RENDER); >> @@ -326,7 +326,7 @@ static void execlists_elsp_write(struct intel_engine_cs *ring, >> >> /* Release Force Wakeup (see the big comment above). */ >> spin_lock_irqsave(&dev_priv->uncore.lock, flags); >> - if (IS_CHERRYVIEW(dev_priv->dev)) { >> + if (IS_CHERRYVIEW(dev_priv->dev) || IS_GEN9(dev_priv->dev)) { >> if (--dev_priv->uncore.fw_rendercount == 0) >> dev_priv->uncore.funcs.force_wake_put(dev_priv, >> FORCEWAKE_RENDER); >> -- >> 2.1.0 >> > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx