From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Anholt Subject: Re: [PATCH] drm/i915: clarify IS_GEN vs IS_ usage Date: Tue, 10 May 2011 11:45:54 -0700 Message-ID: <874o52xul9.fsf@pollan.anholt.net> References: <1304633805-7505-1-git-send-email-jbarnes@virtuousgeek.org> <0d30dc$m4ic2q@orsmga001.jf.intel.com> <20110509114213.34816211@jbarnes-desktop> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1788043129==" Return-path: In-Reply-To: <20110509114213.34816211@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes , Chris Wilson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1788043129== Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha1; protocol="application/pgp-signature" --=-=-= Content-Transfer-Encoding: quoted-printable On Mon, 9 May 2011 11:42:13 -0700, Jesse Barnes = wrote: > On Thu, 05 May 2011 23:57:56 +0100 > Chris Wilson wrote: >=20 > > On Thu, 5 May 2011 15:16:45 -0700, Jesse Barnes wrote: > > > We generally use the gen number to indicate the generation of the ren= der > > > portion of the chip. In some cases this isn't the same as the display > > > generation (as in the case of G33 and GMA500). So codify the de facto > > > usage by converting some IS_GEN checks into product specific checks f= or > > > display related differences. (Note this makes me wonder about our G33 > > > watermark handling; shouldn't it be like 965 not 945? I don't have o= ne > > > to test with...). > >=20 > > As far as I've been able to tell, the current code works... So it can't > > be too far wrong, and I don't recall any mention of deviations in the g= en3 > > docs. >=20 > The gen4 docs mention DevBLC in the FW* reg section though, and > indicate that it has the same programming interface as Cantiga. > Unfortunately I don't have one to test with or I'd check whether the > GM45 code works on G33 as well. This feels like a lot of churn to me, for the pre-gen4 chipsets at least. gen2 is always is_830_display (which is overly specific), and gen3 is always is_i915_display. --=-=-= Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iEYEARECAAYFAk3Jh+IACgkQHUdvYGzw6vdAeACfTX1dx4XimK8t0HSN5nVX1+kA FiIAnRFfx0cTeNx38LzON8RCpAfTMhu1 =shdx -----END PGP SIGNATURE----- --=-=-=-- --===============1788043129== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1788043129==--