From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 08/11] drm/i915/dsb: Add i915.enable_dsb module parameter
Date: Tue, 18 Jun 2024 14:07:56 +0300 [thread overview]
Message-ID: <875xu6h5kj.fsf@intel.com> (raw)
In-Reply-To: <20240611133344.30673-9-ville.syrjala@linux.intel.com>
On Tue, 11 Jun 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> As we extend the use of DSB for critical pipe/plane register
> programming, it'll be nice to have an escape valve at hand,
> in case things go very poorly. To that end, add a i915.enable_dsb
> modparam by which we can force the driver to take the pure mmio
> path instead.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_dsb.c | 3 +++
> 3 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index aebdb7b59dbf..449a31767791 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -54,6 +54,9 @@ intel_display_param_named_unsafe(enable_dc, int, 0400,
> intel_display_param_named_unsafe(enable_dpt, bool, 0400,
> "Enable display page table (DPT) (default: true)");
>
> +intel_display_param_named_unsafe(enable_dsb, bool, 0600,
> + "Enable display state buffer (DSB) (default: true)");
Not much point in leaving the module param 0600, is there?
BR,
Jani.
> +
> intel_display_param_named_unsafe(enable_sagv, bool, 0400,
> "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 1208a62c16d2..48c29c55c939 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -31,6 +31,7 @@ struct drm_i915_private;
> param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
> + param(bool, enable_dsb, true, 0600) \
> param(bool, enable_sagv, true, 0600) \
> param(int, disable_power_well, -1, 0400) \
> param(bool, enable_ips, true, 0600) \
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
> index bee48ac419ce..2ab3765f6c06 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -460,6 +460,9 @@ struct intel_dsb *intel_dsb_prepare(struct intel_atomic_state *state,
> if (!HAS_DSB(i915))
> return NULL;
>
> + if (!i915->display.params.enable_dsb)
> + return NULL;
> +
> /* TODO: DSB is broken in Xe KMD, so disabling it until fixed */
> if (!IS_ENABLED(I915))
> return NULL;
--
Jani Nikula, Intel
next prev parent reply other threads:[~2024-06-18 11:08 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-11 13:33 [PATCH 00/11] drm/i915/dsb: DSB prep stuff Ville Syrjala
2024-06-11 13:33 ` [PATCH 01/11] drm/i915: Extract intel_crtc_arm_vblank_event() Ville Syrjala
2024-06-11 13:33 ` [PATCH 02/11] drm/i915: Add async flip tracepoint Ville Syrjala
2024-06-11 13:33 ` [PATCH 03/11] drm/i915: Add flip done tracepoint Ville Syrjala
2024-06-11 13:33 ` [PATCH 04/11] drm/i915: Introduce intel_mode_vdisplay() Ville Syrjala
2024-06-11 13:33 ` [PATCH 05/11] drm/i915: Pass the whole atomic state to intel_color_prepare_commit() Ville Syrjala
2024-06-11 13:33 ` [PATCH 06/11] drm/i915/dsb: Plumb the whole atomic state into intel_dsb_prepare() Ville Syrjala
2024-06-11 13:33 ` [PATCH 07/11] drm/i915/dsb: Convert the DSB code to use intel_display rather than i915 Ville Syrjala
2024-06-18 11:08 ` Jani Nikula
2024-06-11 13:33 ` [PATCH 08/11] drm/i915/dsb: Add i915.enable_dsb module parameter Ville Syrjala
2024-06-18 11:07 ` Jani Nikula [this message]
2024-06-19 11:29 ` Ville Syrjälä
2024-06-19 13:11 ` Jani Nikula
2024-06-19 13:24 ` Ville Syrjälä
2024-06-19 14:44 ` Ville Syrjälä
2024-06-19 14:55 ` Ville Syrjälä
2024-06-19 17:24 ` Jani Nikula
2024-06-11 13:33 ` [PATCH 09/11] drm/i915: Drop useless intel_dsb.h include Ville Syrjala
2024-06-11 13:33 ` [PATCH 10/11] drm/i915/dsb: Document that the ATS fault bits are for mtl+ Ville Syrjala
2024-06-11 13:33 ` [PATCH 11/11] drm/i915/dsb: Try to document that DSB_STATUS bit 16 is level triggered Ville Syrjala
2024-06-11 14:21 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsb: DSB prep stuff Patchwork
2024-06-11 14:21 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-06-11 14:42 ` ✓ Fi.CI.BAT: success " Patchwork
2024-06-12 5:32 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-06-18 11:09 ` [PATCH 00/11] " Jani Nikula
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