From: Jani Nikula <jani.nikula@linux.intel.com>
To: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>,
intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
Date: Fri, 19 Jan 2024 13:48:36 +0200 [thread overview]
Message-ID: <875xzppmqz.fsf@intel.com> (raw)
In-Reply-To: <20240118152745.162960-4-juhapekka.heikkila@gmail.com>
On Thu, 18 Jan 2024, Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> wrote:
> Display engine support ccs only with tile4, prevent other modifiers
> from using compressed memory.
>
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 722c84a56607..579badb8c69e 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -13,6 +13,16 @@
>
> #include <drm/ttm/ttm_bo.h>
>
> +static bool is_compressed(const struct drm_framebuffer *fb)
> +{
> + struct xe_bo *bo = intel_fb_obj(fb);
> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> + struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
> + u16 pat_index_compressed = tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WT];
> +
> + return (bo->pat_index == pat_index_compressed);
> +}
> +
> static void
> write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
> u32 width, u32 height, u32 src_stride, u32 dst_stride)
> @@ -349,12 +359,19 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
> int intel_plane_pin_fb(struct intel_plane_state *plane_state)
> {
> struct drm_framebuffer *fb = plane_state->hw.fb;
> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> struct xe_bo *bo = intel_fb_obj(fb);
> struct i915_vma *vma;
>
> /* We reject creating !SCANOUT fb's, so this is weird.. */
> drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_SCANOUT_BIT));
>
> + if (GRAPHICS_VER(xe) >= 20 && fb->modifier != I915_FORMAT_MOD_4_TILED &&
Is GRAPHICS_VER correct or should that be a DISPLAY_VER instead?
> + is_compressed(fb)) {
> + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
> + return -EINVAL;
> + }
> +
> vma = __xe_pin_fb_vma(to_intel_framebuffer(fb), &plane_state->view.gtt);
> if (IS_ERR(vma))
> return PTR_ERR(vma);
--
Jani Nikula, Intel
next prev parent reply other threads:[~2024-01-19 11:48 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-18 15:27 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 1/4] drm/xe: add bind time pat index to xe_bo structure Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 2/4] drm/xe: store bind time pat index to xe_bo Juha-Pekka Heikkila
2024-01-19 15:45 ` Matthew Auld
2024-01-22 18:26 ` Juha-Pekka Heikkila
2024-01-23 12:59 ` Matthew Auld
2024-01-23 8:05 ` Ville Syrjälä
2024-01-23 9:17 ` Matthew Auld
2024-01-18 15:27 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
2024-01-19 11:48 ` Jani Nikula [this message]
2024-01-19 12:08 ` Juha-Pekka Heikkila
2024-01-19 15:22 ` Matthew Auld
2024-01-22 18:27 ` Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4 Juha-Pekka Heikkila
2024-01-19 12:15 ` Kahola, Mika
2024-01-18 22:45 ` ✗ Fi.CI.BAT: failure for Enable ccs compressed framebuffers on Xe2 Patchwork
2024-01-19 8:57 ` ✓ Fi.CI.BAT: success for Enable ccs compressed framebuffers on Xe2 (rev2) Patchwork
2024-01-19 13:34 ` ✗ Fi.CI.IGT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2024-01-30 19:36 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
2024-01-30 19:36 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
2024-01-31 11:40 ` Ville Syrjälä
2024-01-31 12:09 ` Ville Syrjälä
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