* [PATCH 0/4] Enable ccs compressed framebuffers on Xe2
@ 2024-01-18 15:27 Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 1/4] drm/xe: add bind time pat index to xe_bo structure Juha-Pekka Heikkila
` (6 more replies)
0 siblings, 7 replies; 21+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-18 15:27 UTC (permalink / raw)
To: intel-xe, intel-gfx
This patch set touches Xe and i915 drivers. On i915 is checked if
running on Xe2 hardware and enable framebuffer ccs decompression
unconditionally for tile4 framebuffers. On Xe driver with Xe2
hardware check if ccs compression is in use and behave accordingly;
attempt to use ccs with linear and x-tiled framebuffers will result
in -EINVAL as display does support decompression only on tile4.
Juha-Pekka Heikkila (4):
drm/xe: add bind time pat index to xe_bo structure
drm/xe: store bind time pat index to xe_bo
drm/xe/xe2: Limit ccs framebuffers to tile4 only
drm/i915/display: On Xe2 always enable decompression with tile4
.../gpu/drm/i915/display/skl_universal_plane.c | 5 +++++
drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +++++++++++++++++
drivers/gpu/drm/xe/xe_bo_types.h | 6 ++++++
drivers/gpu/drm/xe/xe_pt.c | 4 ++++
4 files changed, 32 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 1/4] drm/xe: add bind time pat index to xe_bo structure
2024-01-18 15:27 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
@ 2024-01-18 15:27 ` Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 2/4] drm/xe: store bind time pat index to xe_bo Juha-Pekka Heikkila
` (5 subsequent siblings)
6 siblings, 0 replies; 21+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-18 15:27 UTC (permalink / raw)
To: intel-xe, intel-gfx
Add BO bind time pat index member to xe_bo structure
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
drivers/gpu/drm/xe/xe_bo_types.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
index 14ef13b7b421..1825bf013dd0 100644
--- a/drivers/gpu/drm/xe/xe_bo_types.h
+++ b/drivers/gpu/drm/xe/xe_bo_types.h
@@ -91,6 +91,12 @@ struct xe_bo {
/** @vram_userfault_link: Link into @mem_access.vram_userfault.list */
struct list_head vram_userfault_link;
+
+ /**
+ * @pat_index: The pat index requested when bind this BO
+ */
+ u16 pat_index;
+
};
#define intel_bo_to_drm_bo(bo) (&(bo)->ttm.base)
--
2.25.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 2/4] drm/xe: store bind time pat index to xe_bo
2024-01-18 15:27 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 1/4] drm/xe: add bind time pat index to xe_bo structure Juha-Pekka Heikkila
@ 2024-01-18 15:27 ` Juha-Pekka Heikkila
2024-01-19 15:45 ` Matthew Auld
2024-01-18 15:27 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
` (4 subsequent siblings)
6 siblings, 1 reply; 21+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-18 15:27 UTC (permalink / raw)
To: intel-xe, intel-gfx
Store pat index from xe_vma to xe_bo
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
drivers/gpu/drm/xe/xe_pt.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index de1030a47588..4b76db698878 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -1252,6 +1252,10 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
return ERR_PTR(-ENOMEM);
}
+ if (xe_vma_bo(vma)) {
+ xe_vma_bo(vma)->pat_index = vma->pat_index;
+ }
+
fence = xe_migrate_update_pgtables(tile->migrate,
vm, xe_vma_bo(vma), q,
entries, num_entries,
--
2.25.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-18 15:27 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 1/4] drm/xe: add bind time pat index to xe_bo structure Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 2/4] drm/xe: store bind time pat index to xe_bo Juha-Pekka Heikkila
@ 2024-01-18 15:27 ` Juha-Pekka Heikkila
2024-01-19 11:48 ` Jani Nikula
2024-01-19 15:22 ` Matthew Auld
2024-01-18 15:27 ` [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4 Juha-Pekka Heikkila
` (3 subsequent siblings)
6 siblings, 2 replies; 21+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-18 15:27 UTC (permalink / raw)
To: intel-xe, intel-gfx
Display engine support ccs only with tile4, prevent other modifiers
from using compressed memory.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 722c84a56607..579badb8c69e 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -13,6 +13,16 @@
#include <drm/ttm/ttm_bo.h>
+static bool is_compressed(const struct drm_framebuffer *fb)
+{
+ struct xe_bo *bo = intel_fb_obj(fb);
+ struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
+ struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
+ u16 pat_index_compressed = tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WT];
+
+ return (bo->pat_index == pat_index_compressed);
+}
+
static void
write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
u32 width, u32 height, u32 src_stride, u32 dst_stride)
@@ -349,12 +359,19 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
int intel_plane_pin_fb(struct intel_plane_state *plane_state)
{
struct drm_framebuffer *fb = plane_state->hw.fb;
+ struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
struct xe_bo *bo = intel_fb_obj(fb);
struct i915_vma *vma;
/* We reject creating !SCANOUT fb's, so this is weird.. */
drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_SCANOUT_BIT));
+ if (GRAPHICS_VER(xe) >= 20 && fb->modifier != I915_FORMAT_MOD_4_TILED &&
+ is_compressed(fb)) {
+ drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
+ return -EINVAL;
+ }
+
vma = __xe_pin_fb_vma(to_intel_framebuffer(fb), &plane_state->view.gtt);
if (IS_ERR(vma))
return PTR_ERR(vma);
--
2.25.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4
2024-01-18 15:27 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
` (2 preceding siblings ...)
2024-01-18 15:27 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
@ 2024-01-18 15:27 ` Juha-Pekka Heikkila
2024-01-19 12:15 ` Kahola, Mika
2024-01-18 22:45 ` ✗ Fi.CI.BAT: failure for Enable ccs compressed framebuffers on Xe2 Patchwork
` (2 subsequent siblings)
6 siblings, 1 reply; 21+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-18 15:27 UTC (permalink / raw)
To: intel-xe, intel-gfx
With Xe2 always treat tile4 as if it was using flat ccs.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 511dc1544854..43209909593f 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -948,6 +948,11 @@ static u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
if (DISPLAY_VER(dev_priv) == 13)
plane_ctl |= adlp_plane_ctl_arb_slots(plane_state);
+ if (GRAPHICS_VER(dev_priv) >= 20 &&
+ fb->modifier == I915_FORMAT_MOD_4_TILED) {
+ plane_ctl |= PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
+ }
+
return plane_ctl;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* ✗ Fi.CI.BAT: failure for Enable ccs compressed framebuffers on Xe2
2024-01-18 15:27 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
` (3 preceding siblings ...)
2024-01-18 15:27 ` [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4 Juha-Pekka Heikkila
@ 2024-01-18 22:45 ` Patchwork
2024-01-19 8:57 ` ✓ Fi.CI.BAT: success for Enable ccs compressed framebuffers on Xe2 (rev2) Patchwork
2024-01-19 13:34 ` ✗ Fi.CI.IGT: failure " Patchwork
6 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2024-01-18 22:45 UTC (permalink / raw)
To: Juha-Pekka Heikkila; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 12088 bytes --]
== Series Details ==
Series: Enable ccs compressed framebuffers on Xe2
URL : https://patchwork.freedesktop.org/series/128947/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14139 -> Patchwork_128947v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_128947v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_128947v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/index.html
Participating hosts (37 -> 37)
------------------------------
Additional (2): bat-dg2-8 bat-mtlp-8
Missing (2): bat-dg2-9 fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_128947v1:
### IGT changes ###
#### Possible regressions ####
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1:
- bat-rpls-2: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14139/bat-rpls-2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-rpls-2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1.html
Known issues
------------
Here are the changes found in Patchwork_128947v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- bat-mtlp-8: NOTRUN -> [SKIP][3] ([i915#9318])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@debugfs_test@basic-hwmon.html
* igt@gem_lmem_swapping@verify-random:
- bat-mtlp-8: NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@gem_lmem_swapping@verify-random.html
* igt@gem_mmap@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#4083])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@gem_mmap@basic.html
- bat-dg2-8: NOTRUN -> [SKIP][6] ([i915#4083])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@gem_mmap@basic.html
* igt@gem_mmap_gtt@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][7] ([i915#4077]) +2 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@gem_mmap_gtt@basic.html
- bat-dg2-8: NOTRUN -> [SKIP][8] ([i915#4077]) +2 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@gem_mmap_gtt@basic.html
* igt@gem_render_tiled_blits@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][9] ([i915#4079]) +1 other test skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@gem_render_tiled_blits@basic.html
* igt@gem_tiled_pread_basic:
- bat-dg2-8: NOTRUN -> [SKIP][10] ([i915#4079]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rps@basic-api:
- bat-mtlp-8: NOTRUN -> [SKIP][11] ([i915#6621])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@i915_pm_rps@basic-api.html
- bat-dg2-8: NOTRUN -> [SKIP][12] ([i915#6621])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@i915_pm_rps@basic-api.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-mtlp-8: NOTRUN -> [SKIP][13] ([i915#6645])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@i915_suspend@basic-s3-without-i915.html
- bat-dg2-8: NOTRUN -> [SKIP][14] ([i915#6645])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#5190])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-dg2-8: NOTRUN -> [SKIP][16] ([i915#5190])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][17] ([i915#4212]) +8 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html
- bat-dg2-8: NOTRUN -> [SKIP][18] ([i915#4215] / [i915#5190])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- bat-dg2-8: NOTRUN -> [SKIP][19] ([i915#4212]) +7 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][20] ([i915#4213]) +1 other test skip
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- bat-dg2-8: NOTRUN -> [SKIP][21] ([i915#4103] / [i915#4213]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-mtlp-8: NOTRUN -> [SKIP][22] ([i915#3555] / [i915#3840] / [i915#9159])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-mtlp-8: NOTRUN -> [SKIP][23] ([fdo#109285])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@kms_force_connector_basic@force-load-detect.html
- bat-dg2-8: NOTRUN -> [SKIP][24] ([fdo#109285])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-mtlp-8: NOTRUN -> [SKIP][25] ([i915#5274])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@kms_force_connector_basic@prune-stale-modes.html
- bat-dg2-8: NOTRUN -> [SKIP][26] ([i915#5274])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_pm_backlight@basic-brightness:
- bat-dg2-8: NOTRUN -> [SKIP][27] ([i915#5354])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-mtlp-8: NOTRUN -> [SKIP][28] ([i915#3555] / [i915#8809])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@kms_setmode@basic-clone-single-crtc.html
- bat-dg2-8: NOTRUN -> [SKIP][29] ([i915#3555])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-dg2-8: NOTRUN -> [SKIP][30] ([i915#3708])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-mmap:
- bat-dg2-8: NOTRUN -> [SKIP][31] ([i915#3708] / [i915#4077]) +1 other test skip
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@prime_vgem@basic-fence-mmap.html
- bat-mtlp-8: NOTRUN -> [SKIP][32] ([i915#3708] / [i915#4077]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-fence-read:
- bat-mtlp-8: NOTRUN -> [SKIP][33] ([i915#3708]) +2 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-mtlp-8/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-write:
- bat-dg2-8: NOTRUN -> [SKIP][34] ([i915#3291] / [i915#3708]) +2 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-dg2-8/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@gem_tiled_blits@basic:
- fi-pnv-d510: [SKIP][35] ([fdo#109271]) -> [PASS][36] +1 other test pass
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14139/fi-pnv-d510/igt@gem_tiled_blits@basic.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/fi-pnv-d510/igt@gem_tiled_blits@basic.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1:
- bat-rpls-2: [ABORT][37] ([i915#10117]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14139/bat-rpls-2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/bat-rpls-2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#10117]: https://gitlab.freedesktop.org/drm/intel/issues/10117
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#8809]: https://gitlab.freedesktop.org/drm/intel/issues/8809
[i915#9159]: https://gitlab.freedesktop.org/drm/intel/issues/9159
[i915#9318]: https://gitlab.freedesktop.org/drm/intel/issues/9318
[i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
[i915#9688]: https://gitlab.freedesktop.org/drm/intel/issues/9688
[i915#9732]: https://gitlab.freedesktop.org/drm/intel/issues/9732
Build changes
-------------
* Linux: CI_DRM_14139 -> Patchwork_128947v1
CI-20190529: 20190529
CI_DRM_14139: 776dc1588b4b329dba41ded2db883fbc1bf77950 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7683: 7683
Patchwork_128947v1: 776dc1588b4b329dba41ded2db883fbc1bf77950 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
127167929bd5 drm/i915/display: On Xe2 always enable decompression with tile4
03de61a2dc48 drm/xe/xe2: Limit ccs framebuffers to tile4 only
511ba48f3be3 drm/xe: store bind time pat index to xe_bo
63cf29232ce3 drm/xe: add bind time pat index to xe_bo structure
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v1/index.html
[-- Attachment #2: Type: text/html, Size: 14436 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* ✓ Fi.CI.BAT: success for Enable ccs compressed framebuffers on Xe2 (rev2)
2024-01-18 15:27 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
` (4 preceding siblings ...)
2024-01-18 22:45 ` ✗ Fi.CI.BAT: failure for Enable ccs compressed framebuffers on Xe2 Patchwork
@ 2024-01-19 8:57 ` Patchwork
2024-01-19 13:34 ` ✗ Fi.CI.IGT: failure " Patchwork
6 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2024-01-19 8:57 UTC (permalink / raw)
To: Juha-Pekka Heikkila; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4610 bytes --]
== Series Details ==
Series: Enable ccs compressed framebuffers on Xe2 (rev2)
URL : https://patchwork.freedesktop.org/series/128947/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14144 -> Patchwork_128947v2
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/index.html
Participating hosts (36 -> 36)
------------------------------
Additional (1): fi-pnv-d510
Missing (1): fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_128947v2 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s0@smem:
- bat-jsl-1: [PASS][1] -> [INCOMPLETE][2] ([i915#9883])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/bat-jsl-1/igt@gem_exec_suspend@basic-s0@smem.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/bat-jsl-1/igt@gem_exec_suspend@basic-s0@smem.html
* igt@gem_lmem_swapping@basic:
- fi-pnv-d510: NOTRUN -> [SKIP][3] ([fdo#109271]) +31 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/fi-pnv-d510/igt@gem_lmem_swapping@basic.html
* igt@i915_pm_rpm@module-reload:
- fi-apl-guc: [PASS][4] -> [DMESG-WARN][5] ([i915#1982] / [i915#8585])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/fi-apl-guc/igt@i915_pm_rpm@module-reload.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/fi-apl-guc/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live@reset:
- fi-apl-guc: [PASS][6] -> [DMESG-WARN][7] ([i915#9730]) +32 other tests dmesg-warn
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/fi-apl-guc/igt@i915_selftest@live@reset.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/fi-apl-guc/igt@i915_selftest@live@reset.html
* igt@i915_suspend@basic-s2idle-without-i915:
- fi-apl-guc: [PASS][8] -> [DMESG-WARN][9] ([i915#180] / [i915#1982])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/fi-apl-guc/igt@i915_suspend@basic-s2idle-without-i915.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/fi-apl-guc/igt@i915_suspend@basic-s2idle-without-i915.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-jsl-1: [PASS][10] -> [FAIL][11] ([i915#10031])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/bat-jsl-1/igt@i915_suspend@basic-s3-without-i915.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/bat-jsl-1/igt@i915_suspend@basic-s3-without-i915.html
#### Possible fixes ####
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1:
- bat-rpls-2: [ABORT][12] ([i915#7978]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/bat-rpls-2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/bat-rpls-2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#10031]: https://gitlab.freedesktop.org/drm/intel/issues/10031
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
[i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
[i915#8585]: https://gitlab.freedesktop.org/drm/intel/issues/8585
[i915#9730]: https://gitlab.freedesktop.org/drm/intel/issues/9730
[i915#9883]: https://gitlab.freedesktop.org/drm/intel/issues/9883
Build changes
-------------
* Linux: CI_DRM_14144 -> Patchwork_128947v2
CI-20190529: 20190529
CI_DRM_14144: 3a46543b6e3ca856486ba5d06e5ba0af865ff357 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7683: 7683
Patchwork_128947v2: 3a46543b6e3ca856486ba5d06e5ba0af865ff357 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
1a9553baef47 drm/i915/display: On Xe2 always enable decompression with tile4
92f78d8bbe66 drm/xe/xe2: Limit ccs framebuffers to tile4 only
425d84f21e11 drm/xe: store bind time pat index to xe_bo
7647e809c996 drm/xe: add bind time pat index to xe_bo structure
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/index.html
[-- Attachment #2: Type: text/html, Size: 5403 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-18 15:27 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
@ 2024-01-19 11:48 ` Jani Nikula
2024-01-19 12:08 ` Juha-Pekka Heikkila
2024-01-19 15:22 ` Matthew Auld
1 sibling, 1 reply; 21+ messages in thread
From: Jani Nikula @ 2024-01-19 11:48 UTC (permalink / raw)
To: Juha-Pekka Heikkila, intel-xe, intel-gfx
On Thu, 18 Jan 2024, Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> wrote:
> Display engine support ccs only with tile4, prevent other modifiers
> from using compressed memory.
>
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 722c84a56607..579badb8c69e 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -13,6 +13,16 @@
>
> #include <drm/ttm/ttm_bo.h>
>
> +static bool is_compressed(const struct drm_framebuffer *fb)
> +{
> + struct xe_bo *bo = intel_fb_obj(fb);
> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> + struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
> + u16 pat_index_compressed = tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WT];
> +
> + return (bo->pat_index == pat_index_compressed);
> +}
> +
> static void
> write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
> u32 width, u32 height, u32 src_stride, u32 dst_stride)
> @@ -349,12 +359,19 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
> int intel_plane_pin_fb(struct intel_plane_state *plane_state)
> {
> struct drm_framebuffer *fb = plane_state->hw.fb;
> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> struct xe_bo *bo = intel_fb_obj(fb);
> struct i915_vma *vma;
>
> /* We reject creating !SCANOUT fb's, so this is weird.. */
> drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_SCANOUT_BIT));
>
> + if (GRAPHICS_VER(xe) >= 20 && fb->modifier != I915_FORMAT_MOD_4_TILED &&
Is GRAPHICS_VER correct or should that be a DISPLAY_VER instead?
> + is_compressed(fb)) {
> + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
> + return -EINVAL;
> + }
> +
> vma = __xe_pin_fb_vma(to_intel_framebuffer(fb), &plane_state->view.gtt);
> if (IS_ERR(vma))
> return PTR_ERR(vma);
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-19 11:48 ` Jani Nikula
@ 2024-01-19 12:08 ` Juha-Pekka Heikkila
0 siblings, 0 replies; 21+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-19 12:08 UTC (permalink / raw)
To: Jani Nikula, intel-xe, intel-gfx
On 19.1.2024 13.48, Jani Nikula wrote:
> On Thu, 18 Jan 2024, Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> wrote:
>> Display engine support ccs only with tile4, prevent other modifiers
>> from using compressed memory.
>>
>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>> ---
>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> index 722c84a56607..579badb8c69e 100644
>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> @@ -13,6 +13,16 @@
>>
>> #include <drm/ttm/ttm_bo.h>
>>
>> +static bool is_compressed(const struct drm_framebuffer *fb)
>> +{
>> + struct xe_bo *bo = intel_fb_obj(fb);
>> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
>> + struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
>> + u16 pat_index_compressed = tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WT];
>> +
>> + return (bo->pat_index == pat_index_compressed);
>> +}
>> +
>> static void
>> write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
>> u32 width, u32 height, u32 src_stride, u32 dst_stride)
>> @@ -349,12 +359,19 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
>> int intel_plane_pin_fb(struct intel_plane_state *plane_state)
>> {
>> struct drm_framebuffer *fb = plane_state->hw.fb;
>> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
>> struct xe_bo *bo = intel_fb_obj(fb);
>> struct i915_vma *vma;
>>
>> /* We reject creating !SCANOUT fb's, so this is weird.. */
>> drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_SCANOUT_BIT));
>>
>> + if (GRAPHICS_VER(xe) >= 20 && fb->modifier != I915_FORMAT_MOD_4_TILED &&
>
> Is GRAPHICS_VER correct or should that be a DISPLAY_VER instead?
I think GRAPHICS_VER is correct here because this depend if base ccs
functionality is there which doesn't relate to display version.
>
>> + is_compressed(fb)) {
>> + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
>> + return -EINVAL;
>> + }
>> +
>> vma = __xe_pin_fb_vma(to_intel_framebuffer(fb), &plane_state->view.gtt);
>> if (IS_ERR(vma))
>> return PTR_ERR(vma);
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4
2024-01-18 15:27 ` [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4 Juha-Pekka Heikkila
@ 2024-01-19 12:15 ` Kahola, Mika
0 siblings, 0 replies; 21+ messages in thread
From: Kahola, Mika @ 2024-01-19 12:15 UTC (permalink / raw)
To: Juha-Pekka Heikkila, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Juha-Pekka Heikkila
> Sent: Thursday, January 18, 2024 5:28 PM
> To: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4
>
> With Xe2 always treat tile4 as if it was using flat ccs.
>
Looks ok to me.
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
> drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 511dc1544854..43209909593f 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -948,6 +948,11 @@ static u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
> if (DISPLAY_VER(dev_priv) == 13)
> plane_ctl |= adlp_plane_ctl_arb_slots(plane_state);
>
> + if (GRAPHICS_VER(dev_priv) >= 20 &&
> + fb->modifier == I915_FORMAT_MOD_4_TILED) {
> + plane_ctl |= PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
> + }
> +
> return plane_ctl;
> }
>
> --
> 2.25.1
^ permalink raw reply [flat|nested] 21+ messages in thread
* ✗ Fi.CI.IGT: failure for Enable ccs compressed framebuffers on Xe2 (rev2)
2024-01-18 15:27 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
` (5 preceding siblings ...)
2024-01-19 8:57 ` ✓ Fi.CI.BAT: success for Enable ccs compressed framebuffers on Xe2 (rev2) Patchwork
@ 2024-01-19 13:34 ` Patchwork
6 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2024-01-19 13:34 UTC (permalink / raw)
To: Juha-Pekka Heikkila; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 68600 bytes --]
== Series Details ==
Series: Enable ccs compressed framebuffers on Xe2 (rev2)
URL : https://patchwork.freedesktop.org/series/128947/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14144_full -> Patchwork_128947v2_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_128947v2_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_128947v2_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (9 -> 9)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_128947v2_full:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@gt_pm:
- shard-rkl: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-5/igt@i915_selftest@live@gt_pm.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-2/igt@i915_selftest@live@gt_pm.html
* igt@kms_plane_alpha_blend@alpha-transparent-fb:
- shard-dg2: NOTRUN -> [INCOMPLETE][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@kms_plane_alpha_blend@alpha-transparent-fb.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_content_protection@lic-type-1}:
- shard-snb: [SKIP][4] ([fdo#109271]) -> [INCOMPLETE][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-snb1/igt@kms_content_protection@lic-type-1.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-snb7/igt@kms_content_protection@lic-type-1.html
Known issues
------------
Here are the changes found in Patchwork_128947v2_full that come from known issues:
### CI changes ###
#### Issues hit ####
* boot:
- shard-rkl: ([PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29]) -> ([PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [FAIL][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53]) ([i915#8293])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-7/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-7/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-7/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-7/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-6/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-6/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-6/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-6/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-5/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-5/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-5/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-4/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-4/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-4/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-4/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-3/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-3/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-3/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-2/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-2/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-1/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-1/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-1/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-1/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-2/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-2/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-2/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-3/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-4/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-4/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-4/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-4/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-4/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-5/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-5/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-5/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-5/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-5/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-6/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-6/boot.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-6/boot.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-6/boot.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-7/boot.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-7/boot.html
- shard-glk: ([PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74]) -> ([PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [FAIL][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95]) ([i915#8293])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk9/boot.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk9/boot.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk9/boot.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk8/boot.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk8/boot.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk8/boot.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk7/boot.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk7/boot.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk7/boot.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk5/boot.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk5/boot.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk5/boot.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk4/boot.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk4/boot.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk4/boot.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk3/boot.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk3/boot.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk3/boot.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk1/boot.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk1/boot.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-glk1/boot.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk1/boot.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk1/boot.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk1/boot.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk3/boot.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk3/boot.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk3/boot.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk4/boot.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk4/boot.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk4/boot.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk4/boot.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk5/boot.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk5/boot.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk7/boot.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk7/boot.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk8/boot.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk8/boot.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk8/boot.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk8/boot.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk9/boot.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk9/boot.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk9/boot.html
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-purge-cache:
- shard-mtlp: NOTRUN -> [SKIP][96] ([i915#8411])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@api_intel_bb@blit-reloc-purge-cache.html
* igt@api_intel_bb@object-reloc-purge-cache:
- shard-dg2: NOTRUN -> [SKIP][97] ([i915#8411]) +1 other test skip
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@api_intel_bb@object-reloc-purge-cache.html
* igt@drm_fdinfo@all-busy-idle-check-all:
- shard-mtlp: NOTRUN -> [SKIP][98] ([i915#8414])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@drm_fdinfo@all-busy-idle-check-all.html
* igt@drm_fdinfo@busy-idle-check-all@ccs3:
- shard-dg2: NOTRUN -> [SKIP][99] ([i915#8414]) +29 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@drm_fdinfo@busy-idle-check-all@ccs3.html
* igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl: [PASS][100] -> [FAIL][101] ([i915#7742]) +1 other test fail
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-4/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
* igt@drm_fdinfo@virtual-busy-hang:
- shard-dg1: NOTRUN -> [SKIP][102] ([i915#8414])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@drm_fdinfo@virtual-busy-hang.html
* igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0:
- shard-dg2: [PASS][103] -> [INCOMPLETE][104] ([i915#7297])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-dg2-5/igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0.html
* igt@gem_close_race@multigpu-basic-process:
- shard-dg2: NOTRUN -> [SKIP][105] ([i915#7697])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@gem_close_race@multigpu-basic-process.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-dg2: NOTRUN -> [INCOMPLETE][106] ([i915#9364])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-5/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_ctx_persistence@hang:
- shard-dg1: NOTRUN -> [SKIP][107] ([i915#8555])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@gem_ctx_persistence@hang.html
* igt@gem_ctx_persistence@heartbeat-close:
- shard-mtlp: NOTRUN -> [SKIP][108] ([i915#8555])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@gem_ctx_persistence@heartbeat-close.html
* igt@gem_ctx_persistence@heartbeat-stop:
- shard-dg2: NOTRUN -> [SKIP][109] ([i915#8555])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@gem_ctx_persistence@heartbeat-stop.html
* igt@gem_exec_balancer@bonded-false-hang:
- shard-dg2: NOTRUN -> [SKIP][110] ([i915#4812]) +1 other test skip
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@gem_exec_balancer@bonded-false-hang.html
* igt@gem_exec_capture@capture-invisible@lmem0:
- shard-dg2: NOTRUN -> [SKIP][111] ([i915#6334]) +1 other test skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-5/igt@gem_exec_capture@capture-invisible@lmem0.html
* igt@gem_exec_capture@many-4k-zero:
- shard-dg1: NOTRUN -> [FAIL][112] ([i915#9606])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@gem_exec_capture@many-4k-zero.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-tglu: [PASS][113] -> [FAIL][114] ([i915#2842])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-tglu-8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-9/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_flush@basic-batch-kernel-default-uc:
- shard-dg2: NOTRUN -> [SKIP][115] ([i915#3539] / [i915#4852])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@gem_exec_flush@basic-batch-kernel-default-uc.html
* igt@gem_exec_flush@basic-uc-prw-default:
- shard-dg2: NOTRUN -> [SKIP][116] ([i915#3539])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@gem_exec_flush@basic-uc-prw-default.html
* igt@gem_exec_params@secure-non-master:
- shard-dg2: NOTRUN -> [SKIP][117] ([fdo#112283])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@gem_exec_params@secure-non-master.html
* igt@gem_exec_reloc@basic-cpu-active:
- shard-mtlp: NOTRUN -> [SKIP][118] ([i915#3281])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@gem_exec_reloc@basic-cpu-active.html
* igt@gem_exec_reloc@basic-cpu-wc-noreloc:
- shard-rkl: NOTRUN -> [SKIP][119] ([i915#3281])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@gem_exec_reloc@basic-cpu-wc-noreloc.html
* igt@gem_exec_reloc@basic-write-read-active:
- shard-dg2: NOTRUN -> [SKIP][120] ([i915#3281]) +7 other tests skip
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@gem_exec_reloc@basic-write-read-active.html
* igt@gem_exec_schedule@preempt-queue-contexts:
- shard-dg2: NOTRUN -> [SKIP][121] ([i915#4537] / [i915#4812])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@gem_exec_schedule@preempt-queue-contexts.html
* igt@gem_exec_suspend@basic-s4-devices@smem:
- shard-rkl: NOTRUN -> [ABORT][122] ([i915#7975] / [i915#8213])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@gem_exec_suspend@basic-s4-devices@smem.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- shard-dg1: [PASS][123] -> [TIMEOUT][124] ([i915#5493])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-dg1-12/igt@gem_lmem_swapping@smem-oom@lmem0.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-15/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@gem_lmem_swapping@verify-random-ccs:
- shard-glk: NOTRUN -> [SKIP][125] ([fdo#109271] / [i915#4613])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk8/igt@gem_lmem_swapping@verify-random-ccs.html
* igt@gem_media_vme:
- shard-mtlp: NOTRUN -> [SKIP][126] ([i915#284])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@gem_media_vme.html
* igt@gem_mmap_gtt@cpuset-big-copy:
- shard-dg2: NOTRUN -> [SKIP][127] ([i915#4077]) +9 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@gem_mmap_gtt@cpuset-big-copy.html
* igt@gem_mmap_gtt@fault-concurrent-y:
- shard-mtlp: NOTRUN -> [SKIP][128] ([i915#4077]) +1 other test skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@gem_mmap_gtt@fault-concurrent-y.html
* igt@gem_mmap_offset@clear@smem0:
- shard-mtlp: [PASS][129] -> [ABORT][130] ([i915#10029])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-mtlp-2/igt@gem_mmap_offset@clear@smem0.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-2/igt@gem_mmap_offset@clear@smem0.html
* igt@gem_mmap_wc@coherency:
- shard-mtlp: NOTRUN -> [SKIP][131] ([i915#4083]) +3 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@gem_mmap_wc@coherency.html
* igt@gem_mmap_wc@write-prefaulted:
- shard-dg2: NOTRUN -> [SKIP][132] ([i915#4083]) +1 other test skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@gem_mmap_wc@write-prefaulted.html
* igt@gem_partial_pwrite_pread@write:
- shard-dg2: NOTRUN -> [SKIP][133] ([i915#3282]) +2 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@gem_partial_pwrite_pread@write.html
* igt@gem_pwrite@basic-exhaustion:
- shard-glk: NOTRUN -> [WARN][134] ([i915#2658])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk7/igt@gem_pwrite@basic-exhaustion.html
- shard-mtlp: NOTRUN -> [SKIP][135] ([i915#3282])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_pxp@protected-raw-src-copy-not-readible:
- shard-dg2: NOTRUN -> [SKIP][136] ([i915#4270])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@gem_pxp@protected-raw-src-copy-not-readible.html
* igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled:
- shard-mtlp: NOTRUN -> [SKIP][137] ([i915#8428]) +1 other test skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled.html
* igt@gem_softpin@evict-snoop:
- shard-dg2: NOTRUN -> [SKIP][138] ([i915#4885])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@gem_softpin@evict-snoop.html
* igt@gem_userptr_blits@readonly-pwrite-unsync:
- shard-dg2: NOTRUN -> [SKIP][139] ([i915#3297]) +1 other test skip
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@gem_userptr_blits@readonly-pwrite-unsync.html
* igt@gem_userptr_blits@relocations:
- shard-dg1: NOTRUN -> [SKIP][140] ([i915#3281]) +1 other test skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@gem_userptr_blits@relocations.html
* igt@gen3_render_linear_blits:
- shard-dg2: NOTRUN -> [SKIP][141] ([fdo#109289]) +5 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@gen3_render_linear_blits.html
* igt@gen9_exec_parse@allowed-all:
- shard-dg1: NOTRUN -> [SKIP][142] ([i915#2527])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@gen9_exec_parse@allowed-all.html
- shard-tglu: NOTRUN -> [SKIP][143] ([i915#2527] / [i915#2856])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-9/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@cmd-crossing-page:
- shard-mtlp: NOTRUN -> [SKIP][144] ([i915#2856])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@gen9_exec_parse@cmd-crossing-page.html
* igt@gen9_exec_parse@secure-batches:
- shard-dg2: NOTRUN -> [SKIP][145] ([i915#2856])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@gen9_exec_parse@secure-batches.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-rkl: [PASS][146] -> [ABORT][147] ([i915#9820])
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-1/igt@i915_module_load@reload-with-fault-injection.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-5/igt@i915_module_load@reload-with-fault-injection.html
- shard-glk: NOTRUN -> [INCOMPLETE][148] ([i915#9200] / [i915#9849])
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk8/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pipe_stress@stress-xrgb8888-ytiled:
- shard-dg2: NOTRUN -> [SKIP][149] ([i915#7091])
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-5/igt@i915_pipe_stress@stress-xrgb8888-ytiled.html
* igt@i915_pm_freq_api@freq-suspend@gt0:
- shard-dg2: [PASS][150] -> [INCOMPLETE][151] ([i915#9407])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-dg2-1/igt@i915_pm_freq_api@freq-suspend@gt0.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@i915_pm_freq_api@freq-suspend@gt0.html
* igt@i915_pm_freq_mult@media-freq@gt0:
- shard-dg1: NOTRUN -> [SKIP][152] ([i915#6590])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@i915_pm_freq_mult@media-freq@gt0.html
- shard-tglu: NOTRUN -> [SKIP][153] ([i915#6590])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-9/igt@i915_pm_freq_mult@media-freq@gt0.html
* igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0:
- shard-dg1: [PASS][154] -> [FAIL][155] ([i915#3591])
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html
* igt@i915_pm_rps@basic-api:
- shard-dg2: NOTRUN -> [SKIP][156] ([i915#6621])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@i915_pm_rps@basic-api.html
* igt@i915_pm_rps@thresholds-idle-park@gt0:
- shard-dg2: NOTRUN -> [SKIP][157] ([i915#8925])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@i915_pm_rps@thresholds-idle-park@gt0.html
* igt@i915_power@sanity:
- shard-mtlp: [PASS][158] -> [SKIP][159] ([i915#7984])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-mtlp-4/igt@i915_power@sanity.html
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-2/igt@i915_power@sanity.html
* igt@i915_suspend@debugfs-reader:
- shard-tglu: NOTRUN -> [ABORT][160] ([i915#8213])
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-9/igt@i915_suspend@debugfs-reader.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- shard-dg2: NOTRUN -> [SKIP][161] ([i915#4215] / [i915#5190])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-4-y-rc-ccs:
- shard-dg1: NOTRUN -> [SKIP][162] ([i915#8709]) +7 other tests skip
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-16/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-4-y-rc-ccs.html
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-mtlp: NOTRUN -> [SKIP][163] ([i915#1769] / [i915#3555])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_atomic_transition@plane-all-modeset-transition.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-dg2: NOTRUN -> [SKIP][164] ([i915#1769] / [i915#3555])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-270:
- shard-mtlp: NOTRUN -> [SKIP][165] ([fdo#111614])
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180:
- shard-rkl: NOTRUN -> [SKIP][166] ([i915#5286])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-mtlp: [PASS][167] -> [FAIL][168] ([i915#5138]) +1 other test fail
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-mtlp-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][169] ([fdo#111614]) +1 other test skip
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-270:
- shard-dg1: NOTRUN -> [SKIP][170] ([i915#3638])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html
- shard-tglu: NOTRUN -> [SKIP][171] ([fdo#111614])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-9/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-tglu: [PASS][172] -> [FAIL][173] ([i915#3743])
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-tglu-3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-10/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-dg2: NOTRUN -> [SKIP][174] ([i915#5190]) +13 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-mtlp: NOTRUN -> [SKIP][175] ([fdo#111615]) +2 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-0:
- shard-tglu: NOTRUN -> [SKIP][176] ([fdo#111615])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-9/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html
- shard-dg1: NOTRUN -> [SKIP][177] ([i915#4538])
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-dg2: NOTRUN -> [SKIP][178] ([i915#4538] / [i915#5190]) +1 other test skip
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_joiner@basic:
- shard-dg2: NOTRUN -> [SKIP][179] ([i915#2705])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-5/igt@kms_big_joiner@basic.html
* igt@kms_ccs@pipe-a-bad-pixel-format-y-tiled-gen12-mc-ccs:
- shard-rkl: NOTRUN -> [SKIP][180] ([i915#5354] / [i915#6095]) +1 other test skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@kms_ccs@pipe-a-bad-pixel-format-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@pipe-b-ccs-on-another-bo-4-tiled-mtl-mc-ccs:
- shard-dg2: NOTRUN -> [SKIP][181] ([i915#5354]) +67 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-5/igt@kms_ccs@pipe-b-ccs-on-another-bo-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y-tiled-ccs:
- shard-dg1: NOTRUN -> [SKIP][182] ([i915#5354] / [i915#6095]) +8 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y-tiled-ccs.html
- shard-tglu: NOTRUN -> [SKIP][183] ([i915#5354] / [i915#6095]) +1 other test skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-9/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y-tiled-ccs.html
* igt@kms_ccs@pipe-c-bad-rotation-90-4-tiled-mtl-rc-ccs:
- shard-rkl: NOTRUN -> [SKIP][184] ([i915#5354]) +1 other test skip
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@kms_ccs@pipe-c-bad-rotation-90-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@pipe-d-bad-rotation-90-4-tiled-dg2-mc-ccs:
- shard-mtlp: NOTRUN -> [SKIP][185] ([i915#5354] / [i915#6095]) +10 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_ccs@pipe-d-bad-rotation-90-4-tiled-dg2-mc-ccs.html
* igt@kms_chamelium_audio@hdmi-audio:
- shard-dg2: NOTRUN -> [SKIP][186] ([i915#7828]) +6 other tests skip
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@kms_chamelium_audio@hdmi-audio.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-dg2: NOTRUN -> [SKIP][187] ([fdo#111827]) +1 other test skip
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_color@ctm-green-to-red:
- shard-mtlp: NOTRUN -> [SKIP][188] ([fdo#111827])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_chamelium_color@ctm-green-to-red.html
* igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
- shard-tglu: NOTRUN -> [SKIP][189] ([i915#7828])
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-9/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html
* igt@kms_chamelium_hpd@vga-hpd-for-each-pipe:
- shard-mtlp: NOTRUN -> [SKIP][190] ([i915#7828]) +2 other tests skip
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html
* igt@kms_content_protection@content-type-change:
- shard-rkl: NOTRUN -> [SKIP][191] ([i915#9424])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-dg2: NOTRUN -> [SKIP][192] ([i915#3299]) +1 other test skip
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@legacy:
- shard-dg2: NOTRUN -> [SKIP][193] ([i915#7118])
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_content_protection@legacy.html
* igt@kms_cursor_crc@cursor-offscreen-32x32:
- shard-dg1: NOTRUN -> [SKIP][194] ([i915#3555])
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@kms_cursor_crc@cursor-offscreen-32x32.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-dg2: NOTRUN -> [SKIP][195] ([i915#3359]) +3 other tests skip
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
- shard-mtlp: NOTRUN -> [SKIP][196] ([fdo#111767]) +1 other test skip
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
- shard-dg2: NOTRUN -> [SKIP][197] ([fdo#109274] / [i915#5354]) +2 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
- shard-mtlp: NOTRUN -> [SKIP][198] ([i915#4213])
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-snb: [PASS][199] -> [SKIP][200] ([fdo#109271]) +10 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-snb7/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-snb4/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-dg2: NOTRUN -> [SKIP][201] ([fdo#109274] / [fdo#111767] / [i915#5354])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-mtlp: NOTRUN -> [SKIP][202] ([i915#9809])
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-dg2: NOTRUN -> [SKIP][203] ([i915#4103] / [i915#4213])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][204] ([i915#9227])
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-3.html
- shard-dg1: NOTRUN -> [SKIP][205] ([i915#9723])
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-13/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-3.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-dg2: NOTRUN -> [SKIP][206] ([i915#9833])
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_display_modes@extended-mode-basic:
- shard-dg2: NOTRUN -> [SKIP][207] ([i915#3555]) +3 other tests skip
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][208] ([i915#3804])
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html
* igt@kms_dsc@dsc-basic:
- shard-rkl: NOTRUN -> [SKIP][209] ([i915#3555] / [i915#3840])
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@kms_dsc@dsc-basic.html
* igt@kms_dsc@dsc-with-bpc:
- shard-dg1: NOTRUN -> [SKIP][210] ([i915#3555] / [i915#3840])
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_feature_discovery@chamelium:
- shard-mtlp: NOTRUN -> [SKIP][211] ([i915#4854])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_feature_discovery@chamelium.html
* igt@kms_flip@2x-absolute-wf_vblank-interruptible:
- shard-mtlp: NOTRUN -> [SKIP][212] ([i915#3637])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-dg2: NOTRUN -> [SKIP][213] ([fdo#109274] / [fdo#111767])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-dg1: NOTRUN -> [SKIP][214] ([fdo#111825] / [i915#9934])
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip@2x-modeset-vs-vblank-race:
- shard-dg2: NOTRUN -> [SKIP][215] ([fdo#109274]) +5 other tests skip
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@kms_flip@2x-modeset-vs-vblank-race.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][216] ([i915#2672]) +1 other test skip
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][217] ([i915#2672]) +2 other tests skip
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-dg1: NOTRUN -> [SKIP][218] ([i915#2587] / [i915#2672])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_force_connector_basic@prune-stale-modes:
- shard-dg2: NOTRUN -> [SKIP][219] ([i915#5274])
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-cpu:
- shard-dg2: NOTRUN -> [FAIL][220] ([i915#6880])
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-cpu:
- shard-dg1: NOTRUN -> [SKIP][221] ([fdo#111825]) +5 other tests skip
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-dg2: NOTRUN -> [SKIP][222] ([i915#3458]) +13 other tests skip
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][223] ([i915#8708]) +19 other tests skip
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-dg2: NOTRUN -> [SKIP][224] ([i915#10055])
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt:
- shard-dg1: NOTRUN -> [SKIP][225] ([i915#3458]) +2 other tests skip
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt.html
- shard-tglu: NOTRUN -> [SKIP][226] ([fdo#110189]) +2 other tests skip
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-9/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-glk: NOTRUN -> [SKIP][227] ([fdo#109271]) +61 other tests skip
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
- shard-mtlp: NOTRUN -> [SKIP][228] ([i915#8708]) +3 other tests skip
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-pgflip-blt:
- shard-mtlp: NOTRUN -> [SKIP][229] ([i915#1825]) +5 other tests skip
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-tglu: NOTRUN -> [SKIP][230] ([fdo#109280]) +2 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-9/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt:
- shard-rkl: NOTRUN -> [SKIP][231] ([fdo#111825] / [i915#1825])
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_hdr@static-toggle:
- shard-dg2: NOTRUN -> [SKIP][232] ([i915#3555] / [i915#8228]) +1 other test skip
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-5/igt@kms_hdr@static-toggle.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-dg2: NOTRUN -> [SKIP][233] ([i915#6301])
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1:
- shard-glk: NOTRUN -> [FAIL][234] ([i915#7862]) +1 other test fail
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-glk7/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1.html
* igt@kms_plane_lowres@tiling-yf:
- shard-dg2: NOTRUN -> [SKIP][235] ([i915#3555] / [i915#8821])
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-5/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-dg2: NOTRUN -> [SKIP][236] ([fdo#109274] / [i915#5354] / [i915#9423])
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [FAIL][237] ([i915#8292])
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4:
- shard-dg1: NOTRUN -> [FAIL][238] ([i915#8292])
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-16/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4.html
* igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][239] ([i915#9423]) +5 other tests skip
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-4/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][240] ([i915#5176] / [i915#9423]) +1 other test skip
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b-hdmi-a-2.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-c-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][241] ([i915#5176] / [i915#9423]) +3 other tests skip
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-16/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-c-hdmi-a-4.html
* igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-a-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][242] ([i915#9423]) +15 other tests skip
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-12/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-a-hdmi-a-3.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][243] ([i915#5235]) +7 other tests skip
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][244] ([i915#5235] / [i915#9423]) +15 other tests skip
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-d-hdmi-a-1.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][245] ([i915#5235]) +15 other tests skip
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-15/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4.html
* igt@kms_pm_dc@dc6-dpms:
- shard-dg1: NOTRUN -> [SKIP][246] ([i915#3361])
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-dg2: [PASS][247] -> [SKIP][248] ([i915#9519])
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-dg2-6/igt@kms_pm_rpm@modeset-non-lpsp.html
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-rkl: [PASS][249] -> [SKIP][250] ([i915#9519]) +1 other test skip
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-6/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
- shard-dg2: NOTRUN -> [SKIP][251] ([i915#9519])
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_prime@basic-crc-hybrid:
- shard-dg2: NOTRUN -> [SKIP][252] ([i915#6524] / [i915#6805])
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@kms_prime@basic-crc-hybrid.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-dg2: NOTRUN -> [SKIP][253] ([i915#9683]) +2 other tests skip
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-10/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-mtlp: NOTRUN -> [SKIP][254] ([i915#4235])
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-mtlp: NOTRUN -> [SKIP][255] ([i915#5289])
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-dg2: NOTRUN -> [SKIP][256] ([i915#4235] / [i915#5190])
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-mtlp: NOTRUN -> [SKIP][257] ([i915#3555] / [i915#8809])
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-mtlp: NOTRUN -> [SKIP][258] ([i915#8623])
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vrr@flip-basic-fastset:
- shard-dg2: NOTRUN -> [SKIP][259] ([i915#9906])
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@kms_vrr@flip-basic-fastset.html
* igt@prime_vgem@coherency-gtt:
- shard-dg2: NOTRUN -> [SKIP][260] ([i915#3708] / [i915#4077])
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-7/igt@prime_vgem@coherency-gtt.html
* igt@sriov_basic@bind-unbind-vf:
- shard-dg2: NOTRUN -> [SKIP][261] ([i915#9917])
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-5/igt@sriov_basic@bind-unbind-vf.html
* igt@sriov_basic@enable-vfs-bind-unbind-each:
- shard-mtlp: NOTRUN -> [SKIP][262] ([i915#9917])
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@sriov_basic@enable-vfs-bind-unbind-each.html
* igt@v3d/v3d_submit_cl@bad-extension:
- shard-mtlp: NOTRUN -> [SKIP][263] ([i915#2575]) +1 other test skip
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@v3d/v3d_submit_cl@bad-extension.html
* igt@v3d/v3d_submit_cl@job-perfmon:
- shard-dg1: NOTRUN -> [SKIP][264] ([i915#2575]) +2 other tests skip
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@v3d/v3d_submit_cl@job-perfmon.html
- shard-tglu: NOTRUN -> [SKIP][265] ([fdo#109315] / [i915#2575])
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-9/igt@v3d/v3d_submit_cl@job-perfmon.html
* igt@v3d/v3d_submit_csd@single-out-sync:
- shard-dg2: NOTRUN -> [SKIP][266] ([i915#2575]) +8 other tests skip
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@v3d/v3d_submit_csd@single-out-sync.html
* igt@v3d/v3d_wait_bo@unused-bo-0ns:
- shard-rkl: NOTRUN -> [SKIP][267] ([fdo#109315]) +1 other test skip
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@v3d/v3d_wait_bo@unused-bo-0ns.html
* igt@vc4/vc4_perfmon@create-single-perfmon:
- shard-mtlp: NOTRUN -> [SKIP][268] ([i915#7711]) +1 other test skip
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-1/igt@vc4/vc4_perfmon@create-single-perfmon.html
* igt@vc4/vc4_perfmon@destroy-valid-perfmon:
- shard-dg2: NOTRUN -> [SKIP][269] ([i915#7711]) +5 other tests skip
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-6/igt@vc4/vc4_perfmon@destroy-valid-perfmon.html
* igt@vc4/vc4_tiling@get-bad-flags:
- shard-rkl: NOTRUN -> [SKIP][270] ([i915#7711])
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@vc4/vc4_tiling@get-bad-flags.html
* igt@vc4/vc4_wait_bo@used-bo-1ns:
- shard-dg1: NOTRUN -> [SKIP][271] ([i915#7711])
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@vc4/vc4_wait_bo@used-bo-1ns.html
#### Possible fixes ####
* igt@fbdev@pan:
- shard-snb: [FAIL][272] ([i915#4435]) -> [PASS][273]
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-snb7/igt@fbdev@pan.html
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-snb4/igt@fbdev@pan.html
* igt@gem_eio@reset-stress:
- shard-dg1: [FAIL][274] ([i915#5784]) -> [PASS][275]
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-dg1-12/igt@gem_eio@reset-stress.html
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-15/igt@gem_eio@reset-stress.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-rkl: [FAIL][276] ([i915#2842]) -> [PASS][277] +2 other tests pass
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-6/igt@gem_exec_fair@basic-none@vcs0.html
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-6/igt@gem_exec_fair@basic-none@vcs0.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-dg1: [INCOMPLETE][278] ([i915#9820] / [i915#9849]) -> [PASS][279]
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-dg1-15/igt@i915_module_load@reload-with-fault-injection.html
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-18/igt@i915_module_load@reload-with-fault-injection.html
- shard-dg2: [DMESG-WARN][280] ([i915#9559]) -> [PASS][281]
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-dg2-7/igt@i915_module_load@reload-with-fault-injection.html
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg2-5/igt@i915_module_load@reload-with-fault-injection.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-180:
- shard-mtlp: [FAIL][282] ([i915#5138]) -> [PASS][283] +1 other test pass
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-mtlp-4/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-mtlp-2/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-tglu: [FAIL][284] ([i915#3743]) -> [PASS][285]
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-tglu-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_flip@flip-vs-absolute-wf_vblank@c-hdmi-a1:
- shard-tglu: [INCOMPLETE][286] -> [PASS][287]
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-tglu-9/igt@kms_flip@flip-vs-absolute-wf_vblank@c-hdmi-a1.html
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-tglu-9/igt@kms_flip@flip-vs-absolute-wf_vblank@c-hdmi-a1.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-gtt:
- shard-snb: [SKIP][288] ([fdo#109271]) -> [PASS][289] +7 other tests pass
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-snb1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-gtt.html
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-rkl: [SKIP][290] ([i915#9519]) -> [PASS][291]
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-rkl-4/igt@kms_pm_rpm@dpms-non-lpsp.html
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-rkl-1/igt@kms_pm_rpm@dpms-non-lpsp.html
#### Warnings ####
* igt@kms_ccs@pipe-b-crc-primary-basic-yf-tiled-ccs:
- shard-dg1: [SKIP][292] ([i915#5354] / [i915#6095]) -> [SKIP][293] ([i915#4423] / [i915#5354] / [i915#6095])
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-dg1-19/igt@kms_ccs@pipe-b-crc-primary-basic-yf-tiled-ccs.html
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-dg1-19/igt@kms_ccs@pipe-b-crc-primary-basic-yf-tiled-ccs.html
* igt@kms_content_protection@atomic:
- shard-snb: [SKIP][294] ([fdo#109271]) -> [INCOMPLETE][295] ([i915#8816])
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-snb5/igt@kms_content_protection@atomic.html
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-snb7/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@srm:
- shard-snb: [INCOMPLETE][296] ([i915#8816]) -> [SKIP][297] ([fdo#109271]) +1 other test skip
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14144/shard-snb7/igt@kms_content_protection@srm.html
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/shard-snb6/igt@kms_content_protection@srm.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#10029]: https://gitlab.freedesktop.org/drm/intel/issues/10029
[i915#10055]: https://gitlab.freedesktop.org/drm/intel/issues/10055
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4435]: https://gitlab.freedesktop.org/drm/intel/issues/4435
[i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4854]: https://gitlab.freedesktop.org/drm/intel/issues/4854
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6805]: https://gitlab.freedesktop.org/drm/intel/issues/6805
[i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880
[i915#7091]: https://gitlab.freedesktop.org/drm/intel/issues/7091
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7297]: https://gitlab.freedesktop.org/drm/intel/issues/7297
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7862]: https://gitlab.freedesktop.org/drm/intel/issues/7862
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#7984]: https://gitlab.freedesktop.org/drm/intel/issues/7984
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
[i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
[i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
[i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
[i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428
[i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
[i915#8623]: https://gitlab.freedesktop.org/drm/intel/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/intel/issues/8709
[i915#8809]: https://gitlab.freedesktop.org/drm/intel/issues/8809
[i915#8816]: https://gitlab.freedesktop.org/drm/intel/issues/8816
[i915#8821]: https://gitlab.freedesktop.org/drm/intel/issues/8821
[i915#8925]: https://gitlab.freedesktop.org/drm/intel/issues/8925
[i915#9200]: https://gitlab.freedesktop.org/drm/intel/issues/9200
[i915#9227]: https://gitlab.freedesktop.org/drm/intel/issues/9227
[i915#9364]: https://gitlab.freedesktop.org/drm/intel/issues/9364
[i915#9407]: https://gitlab.freedesktop.org/drm/intel/issues/9407
[i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/intel/issues/9424
[i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519
[i915#9559]: https://gitlab.freedesktop.org/drm/intel/issues/9559
[i915#9606]: https://gitlab.freedesktop.org/drm/intel/issues/9606
[i915#9683]: https://gitlab.freedesktop.org/drm/intel/issues/9683
[i915#9688]: https://gitlab.freedesktop.org/drm/intel/issues/9688
[i915#9723]: https://gitlab.freedesktop.org/drm/intel/issues/9723
[i915#9732]: https://gitlab.freedesktop.org/drm/intel/issues/9732
[i915#9808]: https://gitlab.freedesktop.org/drm/intel/issues/9808
[i915#9809]: https://gitlab.freedesktop.org/drm/intel/issues/9809
[i915#9820]: https://gitlab.freedesktop.org/drm/intel/issues/9820
[i915#9833]: https://gitlab.freedesktop.org/drm/intel/issues/9833
[i915#9849]: https://gitlab.freedesktop.org/drm/intel/issues/9849
[i915#9906]: https://gitlab.freedesktop.org/drm/intel/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/intel/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/intel/issues/9934
Build changes
-------------
* Linux: CI_DRM_14144 -> Patchwork_128947v2
CI-20190529: 20190529
CI_DRM_14144: 3a46543b6e3ca856486ba5d06e5ba0af865ff357 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7683: 7683
Patchwork_128947v2: 3a46543b6e3ca856486ba5d06e5ba0af865ff357 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v2/index.html
[-- Attachment #2: Type: text/html, Size: 80717 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-18 15:27 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
2024-01-19 11:48 ` Jani Nikula
@ 2024-01-19 15:22 ` Matthew Auld
2024-01-22 18:27 ` Juha-Pekka Heikkila
1 sibling, 1 reply; 21+ messages in thread
From: Matthew Auld @ 2024-01-19 15:22 UTC (permalink / raw)
To: Juha-Pekka Heikkila, intel-xe, intel-gfx
On 18/01/2024 15:27, Juha-Pekka Heikkila wrote:
> Display engine support ccs only with tile4, prevent other modifiers
> from using compressed memory.
>
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 722c84a56607..579badb8c69e 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -13,6 +13,16 @@
>
> #include <drm/ttm/ttm_bo.h>
>
> +static bool is_compressed(const struct drm_framebuffer *fb)
> +{
> + struct xe_bo *bo = intel_fb_obj(fb);
> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> + struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
> + u16 pat_index_compressed = tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WT];
Why just this index? There seems to be various indexes that turn on
compression. How about annotating the pat index table and then have a
helper like xe_pat_index_has_compression(xe, pat_index)?
@@ -104,7 +104,8 @@ static const struct xe_pat_table_entry
xelpg_pat_table[] = {
REG_FIELD_PREP(XE2_L3_POLICY, l3_policy) | \
REG_FIELD_PREP(XE2_L4_POLICY, l4_policy) | \
REG_FIELD_PREP(XE2_COH_MODE, __coh_mode), \
- .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY :
XE_COH_NONE \
+ .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY :
XE_COH_NONE, \
+ .compressed = comp_en \
}
static const struct xe_pat_table_entry xe2_pat_table[] = {
@@ -148,6 +149,12 @@ u16 xe_pat_index_get_coh_mode(struct xe_device *xe,
u16 pat_index)
return xe->pat.table[pat_index].coh_mode;
}
+bool xe_pat_index_has_compression(struct xe_device *xe, u16 pat_index)
+{
+ WARN_ON(pat_index >= xe->pat.n_entries);
+ return xe->pat.table[pat_index].compressed;
+}
+
static void program_pat(struct xe_gt *gt, const struct
xe_pat_table_entry table[],
int n_entries)
{
diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
index fa0dfbe525cd..37666ba1aec4 100644
--- a/drivers/gpu/drm/xe/xe_pat.h
+++ b/drivers/gpu/drm/xe/xe_pat.h
@@ -29,6 +29,7 @@ struct xe_pat_table_entry {
#define XE_COH_NONE 1
#define XE_COH_AT_LEAST_1WAY 2
u16 coh_mode;
+ bool compressed;
};
/**
@@ -58,4 +59,6 @@ void xe_pat_dump(struct xe_gt *gt, struct drm_printer *p);
*/
u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index);
+bool xe_pat_index_has_compression(struct xe_device *xe, u16 pat_index);
> +
> + return (bo->pat_index == pat_index_compressed);
> +}
> +
> static void
> write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
> u32 width, u32 height, u32 src_stride, u32 dst_stride)
> @@ -349,12 +359,19 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
> int intel_plane_pin_fb(struct intel_plane_state *plane_state)
> {
> struct drm_framebuffer *fb = plane_state->hw.fb;
> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> struct xe_bo *bo = intel_fb_obj(fb);
> struct i915_vma *vma;
>
> /* We reject creating !SCANOUT fb's, so this is weird.. */
> drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_SCANOUT_BIT));
>
> + if (GRAPHICS_VER(xe) >= 20 && fb->modifier != I915_FORMAT_MOD_4_TILED &&
> + is_compressed(fb)) {
> + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
> + return -EINVAL;
> + }
> +
> vma = __xe_pin_fb_vma(to_intel_framebuffer(fb), &plane_state->view.gtt);
> if (IS_ERR(vma))
> return PTR_ERR(vma);
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 2/4] drm/xe: store bind time pat index to xe_bo
2024-01-18 15:27 ` [PATCH 2/4] drm/xe: store bind time pat index to xe_bo Juha-Pekka Heikkila
@ 2024-01-19 15:45 ` Matthew Auld
2024-01-22 18:26 ` Juha-Pekka Heikkila
2024-01-23 8:05 ` Ville Syrjälä
0 siblings, 2 replies; 21+ messages in thread
From: Matthew Auld @ 2024-01-19 15:45 UTC (permalink / raw)
To: Juha-Pekka Heikkila, intel-xe, intel-gfx
On 18/01/2024 15:27, Juha-Pekka Heikkila wrote:
> Store pat index from xe_vma to xe_bo
>
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
> drivers/gpu/drm/xe/xe_pt.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> index de1030a47588..4b76db698878 100644
> --- a/drivers/gpu/drm/xe/xe_pt.c
> +++ b/drivers/gpu/drm/xe/xe_pt.c
> @@ -1252,6 +1252,10 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
> return ERR_PTR(-ENOMEM);
> }
>
> + if (xe_vma_bo(vma)) {
> + xe_vma_bo(vma)->pat_index = vma->pat_index;
Multiple mappings will trash this I think. Is that OK for your usecase?
It can be useful to map the same resource as compressed and uncompressed
to facilitate in-place decompression/compression.
Also would be good to be clear about what happens if the KMD doesn't do
anything to prevent compression with non-tile4? Is it just a bit of
display corruption or something much worse that we need to prevent? Is
this just a best effort check to help userspace? Otherwise it is hard to
evaluate how solid we need to be here in our checking to prevent this
scenario. For example how is binding vs display races handled? What
happens if the bind appears after the display check?
> + }
> +
> fence = xe_migrate_update_pgtables(tile->migrate,
> vm, xe_vma_bo(vma), q,
> entries, num_entries,
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 2/4] drm/xe: store bind time pat index to xe_bo
2024-01-19 15:45 ` Matthew Auld
@ 2024-01-22 18:26 ` Juha-Pekka Heikkila
2024-01-23 12:59 ` Matthew Auld
2024-01-23 8:05 ` Ville Syrjälä
1 sibling, 1 reply; 21+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-22 18:26 UTC (permalink / raw)
To: Matthew Auld, intel-xe, intel-gfx, ville.syrjala@linux.intel.com
Hi Matthew, thanks for looking into these. Below few thoughts.
On 19.1.2024 17.45, Matthew Auld wrote:
> On 18/01/2024 15:27, Juha-Pekka Heikkila wrote:
>> Store pat index from xe_vma to xe_bo
>>
>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>> ---
>> drivers/gpu/drm/xe/xe_pt.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
>> index de1030a47588..4b76db698878 100644
>> --- a/drivers/gpu/drm/xe/xe_pt.c
>> +++ b/drivers/gpu/drm/xe/xe_pt.c
>> @@ -1252,6 +1252,10 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct
>> xe_vma *vma, struct xe_exec_queue
>> return ERR_PTR(-ENOMEM);
>> }
>> + if (xe_vma_bo(vma)) {
>> + xe_vma_bo(vma)->pat_index = vma->pat_index;
>
> Multiple mappings will trash this I think. Is that OK for your usecase?
> It can be useful to map the same resource as compressed and uncompressed
> to facilitate in-place decompression/compression.
On i915 I think we did map framebuffers only once and did stay with it
until fb was destroyed. XE_BO_SCANOUT_BIT is for buffers that are meant
to be framebuffers? I could make it so pat index given first is not
allowed to change for buffers with this bit set?
>
> Also would be good to be clear about what happens if the KMD doesn't do
> anything to prevent compression with non-tile4? Is it just a bit of
> display corruption or something much worse that we need to prevent? Is
> this just a best effort check to help userspace? Otherwise it is hard to
> evaluate how solid we need to be here in our checking to prevent this
> scenario. For example how is binding vs display races handled? What
> happens if the bind appears after the display check?
For what happen with incorrect buffers going for display I've seen they
are corrupted on screen but my testing is very minimal. On bspec 67158
it just said linear and tile X formats are not supported with
decompression on display, so it is broken config. Couldn't say generally
how robust display hw is for broken configs. I remember Ville had found
with TGL broken configs caused unrecoverable issues which followed ccs
getting blocked on some steppings because it was only way to block
broken config Ville found. I'll add Ville here on cc if he has views on
this what's needed here for Xe2.
/Juha-Pekka
>
>> + }
>> +
>> fence = xe_migrate_update_pgtables(tile->migrate,
>> vm, xe_vma_bo(vma), q,
>> entries, num_entries,
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-19 15:22 ` Matthew Auld
@ 2024-01-22 18:27 ` Juha-Pekka Heikkila
0 siblings, 0 replies; 21+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-22 18:27 UTC (permalink / raw)
To: Matthew Auld, intel-xe, intel-gfx
On 19.1.2024 17.22, Matthew Auld wrote:
> On 18/01/2024 15:27, Juha-Pekka Heikkila wrote:
>> Display engine support ccs only with tile4, prevent other modifiers
>> from using compressed memory.
>>
>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>> ---
>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> index 722c84a56607..579badb8c69e 100644
>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> @@ -13,6 +13,16 @@
>> #include <drm/ttm/ttm_bo.h>
>> +static bool is_compressed(const struct drm_framebuffer *fb)
>> +{
>> + struct xe_bo *bo = intel_fb_obj(fb);
>> + struct xe_device *xe =
>> to_xe_device(to_intel_framebuffer(fb)->base.dev);
>> + struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
>> + u16 pat_index_compressed =
>> tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WT];
>
> Why just this index? There seems to be various indexes that turn on
> compression. How about annotating the pat index table and then have a
> helper like xe_pat_index_has_compression(xe, pat_index)?
I was wondering why compression was not explicitly stated anywhere so I
did pick only compressed index now used with idea those other indexes
can be added to display part it nobody else needed to know about
compression.
I'll include your suggestion into my patches and see where do it get
with that, thanks!
/Juha-Pekka
>
> @@ -104,7 +104,8 @@ static const struct xe_pat_table_entry
> xelpg_pat_table[] = {
> REG_FIELD_PREP(XE2_L3_POLICY, l3_policy) | \
> REG_FIELD_PREP(XE2_L4_POLICY, l4_policy) | \
> REG_FIELD_PREP(XE2_COH_MODE, __coh_mode), \
> - .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY :
> XE_COH_NONE \
> + .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY :
> XE_COH_NONE, \
> + .compressed = comp_en \
> }
>
> static const struct xe_pat_table_entry xe2_pat_table[] = {
> @@ -148,6 +149,12 @@ u16 xe_pat_index_get_coh_mode(struct xe_device *xe,
> u16 pat_index)
> return xe->pat.table[pat_index].coh_mode;
> }
>
> +bool xe_pat_index_has_compression(struct xe_device *xe, u16 pat_index)
> +{
> + WARN_ON(pat_index >= xe->pat.n_entries);
> + return xe->pat.table[pat_index].compressed;
> +}
> +
> static void program_pat(struct xe_gt *gt, const struct
> xe_pat_table_entry table[],
> int n_entries)
> {
> diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
> index fa0dfbe525cd..37666ba1aec4 100644
> --- a/drivers/gpu/drm/xe/xe_pat.h
> +++ b/drivers/gpu/drm/xe/xe_pat.h
> @@ -29,6 +29,7 @@ struct xe_pat_table_entry {
> #define XE_COH_NONE 1
> #define XE_COH_AT_LEAST_1WAY 2
> u16 coh_mode;
> + bool compressed;
> };
>
> /**
> @@ -58,4 +59,6 @@ void xe_pat_dump(struct xe_gt *gt, struct drm_printer
> *p);
> */
> u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index);
>
> +bool xe_pat_index_has_compression(struct xe_device *xe, u16 pat_index);
>
>> +
>> + return (bo->pat_index == pat_index_compressed);
>> +}
>> +
>> static void
>> write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32
>> *dpt_ofs, u32 bo_ofs,
>> u32 width, u32 height, u32 src_stride, u32 dst_stride)
>> @@ -349,12 +359,19 @@ void intel_unpin_fb_vma(struct i915_vma *vma,
>> unsigned long flags)
>> int intel_plane_pin_fb(struct intel_plane_state *plane_state)
>> {
>> struct drm_framebuffer *fb = plane_state->hw.fb;
>> + struct xe_device *xe =
>> to_xe_device(to_intel_framebuffer(fb)->base.dev);
>> struct xe_bo *bo = intel_fb_obj(fb);
>> struct i915_vma *vma;
>> /* We reject creating !SCANOUT fb's, so this is weird.. */
>> drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_SCANOUT_BIT));
>> + if (GRAPHICS_VER(xe) >= 20 && fb->modifier !=
>> I915_FORMAT_MOD_4_TILED &&
>> + is_compressed(fb)) {
>> + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other
>> than tile4 mofifier\n");
>> + return -EINVAL;
>> + }
>> +
>> vma = __xe_pin_fb_vma(to_intel_framebuffer(fb),
>> &plane_state->view.gtt);
>> if (IS_ERR(vma))
>> return PTR_ERR(vma);
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 2/4] drm/xe: store bind time pat index to xe_bo
2024-01-19 15:45 ` Matthew Auld
2024-01-22 18:26 ` Juha-Pekka Heikkila
@ 2024-01-23 8:05 ` Ville Syrjälä
2024-01-23 9:17 ` Matthew Auld
1 sibling, 1 reply; 21+ messages in thread
From: Ville Syrjälä @ 2024-01-23 8:05 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx, intel-xe
On Fri, Jan 19, 2024 at 03:45:22PM +0000, Matthew Auld wrote:
> On 18/01/2024 15:27, Juha-Pekka Heikkila wrote:
> > Store pat index from xe_vma to xe_bo
> >
> > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> > ---
> > drivers/gpu/drm/xe/xe_pt.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> > index de1030a47588..4b76db698878 100644
> > --- a/drivers/gpu/drm/xe/xe_pt.c
> > +++ b/drivers/gpu/drm/xe/xe_pt.c
> > @@ -1252,6 +1252,10 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
> > return ERR_PTR(-ENOMEM);
> > }
> >
> > + if (xe_vma_bo(vma)) {
> > + xe_vma_bo(vma)->pat_index = vma->pat_index;
>
> Multiple mappings will trash this I think. Is that OK for your usecase?
> It can be useful to map the same resource as compressed and uncompressed
> to facilitate in-place decompression/compression.
I thought the pat_index is set for the entire bo? The
cache_level->pat_index stuff doesn't really work otherwise
I don't think (assuming it works at all).
So dunno why this is doing anything using vmas. I think
what we probably need is to check/set the bo pat_index
at fb create time, and lock it into place (if there's
some mechanism by which a random userspace client could
change it after the fact, and thus screw up everything).
>
> Also would be good to be clear about what happens if the KMD doesn't do
> anything to prevent compression with non-tile4? Is it just a bit of
> display corruption or something much worse that we need to prevent? Is
> this just a best effort check to help userspace? Otherwise it is hard to
> evaluate how solid we need to be here in our checking to prevent this
> scenario. For example how is binding vs display races handled? What
> happens if the bind appears after the display check?
>
> > + }
> > +
> > fence = xe_migrate_update_pgtables(tile->migrate,
> > vm, xe_vma_bo(vma), q,
> > entries, num_entries,
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 2/4] drm/xe: store bind time pat index to xe_bo
2024-01-23 8:05 ` Ville Syrjälä
@ 2024-01-23 9:17 ` Matthew Auld
0 siblings, 0 replies; 21+ messages in thread
From: Matthew Auld @ 2024-01-23 9:17 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, intel-xe
On 23/01/2024 08:05, Ville Syrjälä wrote:
> On Fri, Jan 19, 2024 at 03:45:22PM +0000, Matthew Auld wrote:
>> On 18/01/2024 15:27, Juha-Pekka Heikkila wrote:
>>> Store pat index from xe_vma to xe_bo
>>>
>>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>>> ---
>>> drivers/gpu/drm/xe/xe_pt.c | 4 ++++
>>> 1 file changed, 4 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
>>> index de1030a47588..4b76db698878 100644
>>> --- a/drivers/gpu/drm/xe/xe_pt.c
>>> +++ b/drivers/gpu/drm/xe/xe_pt.c
>>> @@ -1252,6 +1252,10 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
>>> return ERR_PTR(-ENOMEM);
>>> }
>>>
>>> + if (xe_vma_bo(vma)) {
>>> + xe_vma_bo(vma)->pat_index = vma->pat_index;
>>
>> Multiple mappings will trash this I think. Is that OK for your usecase?
>> It can be useful to map the same resource as compressed and uncompressed
>> to facilitate in-place decompression/compression.
>
> I thought the pat_index is set for the entire bo? The
> cache_level->pat_index stuff doesn't really work otherwise
> I don't think (assuming it works at all).
AFAIK it is mostly like that in i915 because it doesn't have a vm_bind
interface. With Xe we have vm_bind. The pat_index is a property of the
ppGTT binding and therefore vma. There seem to be legitimate reasons to
map the same resource with different pat_index, like with
compressed/uncompressed. See BSpec: 58797 "double map (alias) surfaces".
>
> So dunno why this is doing anything using vmas. I think
> what we probably need is to check/set the bo pat_index
> at fb create time, and lock it into place (if there's
> some mechanism by which a random userspace client could
> change it after the fact, and thus screw up everything).
Maybe we can seal the pat_index on first bind or something if the BO
underneath is marked with XE_BO_SCANOUT?
>
>>
>> Also would be good to be clear about what happens if the KMD doesn't do
>> anything to prevent compression with non-tile4? Is it just a bit of
>> display corruption or something much worse that we need to prevent? Is
>> this just a best effort check to help userspace? Otherwise it is hard to
>> evaluate how solid we need to be here in our checking to prevent this
>> scenario. For example how is binding vs display races handled? What
>> happens if the bind appears after the display check?
>>
>>> + }
>>> +
>>> fence = xe_migrate_update_pgtables(tile->migrate,
>>> vm, xe_vma_bo(vma), q,
>>> entries, num_entries,
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 2/4] drm/xe: store bind time pat index to xe_bo
2024-01-22 18:26 ` Juha-Pekka Heikkila
@ 2024-01-23 12:59 ` Matthew Auld
0 siblings, 0 replies; 21+ messages in thread
From: Matthew Auld @ 2024-01-23 12:59 UTC (permalink / raw)
To: juhapekka.heikkila, intel-xe, intel-gfx,
ville.syrjala@linux.intel.com
On 22/01/2024 18:26, Juha-Pekka Heikkila wrote:
> Hi Matthew, thanks for looking into these. Below few thoughts.
>
> On 19.1.2024 17.45, Matthew Auld wrote:
>> On 18/01/2024 15:27, Juha-Pekka Heikkila wrote:
>>> Store pat index from xe_vma to xe_bo
>>>
>>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>>> ---
>>> drivers/gpu/drm/xe/xe_pt.c | 4 ++++
>>> 1 file changed, 4 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
>>> index de1030a47588..4b76db698878 100644
>>> --- a/drivers/gpu/drm/xe/xe_pt.c
>>> +++ b/drivers/gpu/drm/xe/xe_pt.c
>>> @@ -1252,6 +1252,10 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct
>>> xe_vma *vma, struct xe_exec_queue
>>> return ERR_PTR(-ENOMEM);
>>> }
>>> + if (xe_vma_bo(vma)) {
>>> + xe_vma_bo(vma)->pat_index = vma->pat_index;
>>
>> Multiple mappings will trash this I think. Is that OK for your
>> usecase? It can be useful to map the same resource as compressed and
>> uncompressed to facilitate in-place decompression/compression.
>
> On i915 I think we did map framebuffers only once and did stay with it
> until fb was destroyed. XE_BO_SCANOUT_BIT is for buffers that are meant
> to be framebuffers? I could make it so pat index given first is not
> allowed to change for buffers with this bit set?
Yeah, sealing the pat_index for such objects might be the simplest option.
>
>>
>> Also would be good to be clear about what happens if the KMD doesn't
>> do anything to prevent compression with non-tile4? Is it just a bit of
>> display corruption or something much worse that we need to prevent? Is
>> this just a best effort check to help userspace? Otherwise it is hard
>> to evaluate how solid we need to be here in our checking to prevent
>> this scenario. For example how is binding vs display races handled?
>> What happens if the bind appears after the display check?
>
> For what happen with incorrect buffers going for display I've seen they
> are corrupted on screen but my testing is very minimal. On bspec 67158
> it just said linear and tile X formats are not supported with
> decompression on display, so it is broken config. Couldn't say generally
> how robust display hw is for broken configs. I remember Ville had found
> with TGL broken configs caused unrecoverable issues which followed ccs
> getting blocked on some steppings because it was only way to block
> broken config Ville found. I'll add Ville here on cc if he has views on
> this what's needed here for Xe2.
>
> /Juha-Pekka
>
>>
>>> + }
>>> +
>>> fence = xe_migrate_update_pgtables(tile->migrate,
>>> vm, xe_vma_bo(vma), q,
>>> entries, num_entries,
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-30 19:36 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
@ 2024-01-30 19:36 ` Juha-Pekka Heikkila
2024-01-31 11:40 ` Ville Syrjälä
0 siblings, 1 reply; 21+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-30 19:36 UTC (permalink / raw)
To: intel-xe, intel-gfx
Display engine support ccs only with tile4, prevent other modifiers
from using compressed memory.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 722c84a56607..fab0871f0cdf 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -10,9 +10,18 @@
#include "intel_fb_pin.h"
#include "xe_ggtt.h"
#include "xe_gt.h"
+#include "xe_pat.h"
#include <drm/ttm/ttm_bo.h>
+static bool is_compressed(const struct drm_framebuffer *fb)
+{
+ struct xe_bo *bo = intel_fb_obj(fb);
+ struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
+
+ return xe_pat_index_has_compression(xe, bo->pat_index);
+}
+
static void
write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
u32 width, u32 height, u32 src_stride, u32 dst_stride)
@@ -283,6 +292,17 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
if (ret)
goto err;
+ if (GRAPHICS_VER(xe) >= 20) {
+ if (fb->base.modifier != I915_FORMAT_MOD_4_TILED &&
+ is_compressed(&fb->base)) {
+ drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
+ ttm_bo_unreserve(&bo->ttm);
+ ret = -EINVAL;
+ goto err;
+ }
+ bo->has_sealed_pat_index = true;
+ }
+
if (IS_DGFX(xe))
ret = xe_bo_migrate(bo, XE_PL_VRAM0);
else
@@ -308,6 +328,7 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
ttm_bo_unpin(&bo->ttm);
ttm_bo_unreserve(&bo->ttm);
err:
+ bo->has_sealed_pat_index = false;
kfree(vma);
return ERR_PTR(ret);
}
@@ -323,6 +344,8 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
vma->bo->ggtt_node.start != vma->node.start)
xe_ggtt_remove_node(ggtt, &vma->node);
+ vma->bo->has_sealed_pat_index = false;
+
ttm_bo_reserve(&vma->bo->ttm, false, false, NULL);
ttm_bo_unpin(&vma->bo->ttm);
ttm_bo_unreserve(&vma->bo->ttm);
--
2.25.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-30 19:36 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
@ 2024-01-31 11:40 ` Ville Syrjälä
2024-01-31 12:09 ` Ville Syrjälä
0 siblings, 1 reply; 21+ messages in thread
From: Ville Syrjälä @ 2024-01-31 11:40 UTC (permalink / raw)
To: Juha-Pekka Heikkila; +Cc: intel-gfx, intel-xe
On Tue, Jan 30, 2024 at 09:36:51PM +0200, Juha-Pekka Heikkila wrote:
> Display engine support ccs only with tile4, prevent other modifiers
> from using compressed memory.
>
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 722c84a56607..fab0871f0cdf 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -10,9 +10,18 @@
> #include "intel_fb_pin.h"
> #include "xe_ggtt.h"
> #include "xe_gt.h"
> +#include "xe_pat.h"
>
> #include <drm/ttm/ttm_bo.h>
>
> +static bool is_compressed(const struct drm_framebuffer *fb)
> +{
> + struct xe_bo *bo = intel_fb_obj(fb);
> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> +
> + return xe_pat_index_has_compression(xe, bo->pat_index);
> +}
> +
> static void
> write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
> u32 width, u32 height, u32 src_stride, u32 dst_stride)
> @@ -283,6 +292,17 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
> if (ret)
> goto err;
>
> + if (GRAPHICS_VER(xe) >= 20) {
> + if (fb->base.modifier != I915_FORMAT_MOD_4_TILED &&
> + is_compressed(&fb->base)) {
> + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
> + ttm_bo_unreserve(&bo->ttm);
> + ret = -EINVAL;
> + goto err;
> + }
> + bo->has_sealed_pat_index = true;
That needs to happen when the FB is created, otherwise
someone can come in afterwards and still frob the PAT
and then you're left with a FB that can not be used.
> + }
> +
> if (IS_DGFX(xe))
> ret = xe_bo_migrate(bo, XE_PL_VRAM0);
> else
> @@ -308,6 +328,7 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
> ttm_bo_unpin(&bo->ttm);
> ttm_bo_unreserve(&bo->ttm);
> err:
> + bo->has_sealed_pat_index = false;
> kfree(vma);
> return ERR_PTR(ret);
> }
> @@ -323,6 +344,8 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
> vma->bo->ggtt_node.start != vma->node.start)
> xe_ggtt_remove_node(ggtt, &vma->node);
>
> + vma->bo->has_sealed_pat_index = false;
> +
> ttm_bo_reserve(&vma->bo->ttm, false, false, NULL);
> ttm_bo_unpin(&vma->bo->ttm);
> ttm_bo_unreserve(&vma->bo->ttm);
> --
> 2.25.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-31 11:40 ` Ville Syrjälä
@ 2024-01-31 12:09 ` Ville Syrjälä
0 siblings, 0 replies; 21+ messages in thread
From: Ville Syrjälä @ 2024-01-31 12:09 UTC (permalink / raw)
To: Juha-Pekka Heikkila; +Cc: intel-gfx, intel-xe
On Wed, Jan 31, 2024 at 01:40:30PM +0200, Ville Syrjälä wrote:
> On Tue, Jan 30, 2024 at 09:36:51PM +0200, Juha-Pekka Heikkila wrote:
> > Display engine support ccs only with tile4, prevent other modifiers
> > from using compressed memory.
> >
> > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> > ---
> > drivers/gpu/drm/xe/display/xe_fb_pin.c | 23 +++++++++++++++++++++++
> > 1 file changed, 23 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> > index 722c84a56607..fab0871f0cdf 100644
> > --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> > +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> > @@ -10,9 +10,18 @@
> > #include "intel_fb_pin.h"
> > #include "xe_ggtt.h"
> > #include "xe_gt.h"
> > +#include "xe_pat.h"
> >
> > #include <drm/ttm/ttm_bo.h>
> >
> > +static bool is_compressed(const struct drm_framebuffer *fb)
> > +{
> > + struct xe_bo *bo = intel_fb_obj(fb);
> > + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> > +
> > + return xe_pat_index_has_compression(xe, bo->pat_index);
> > +}
> > +
> > static void
> > write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
> > u32 width, u32 height, u32 src_stride, u32 dst_stride)
> > @@ -283,6 +292,17 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
> > if (ret)
> > goto err;
> >
> > + if (GRAPHICS_VER(xe) >= 20) {
> > + if (fb->base.modifier != I915_FORMAT_MOD_4_TILED &&
> > + is_compressed(&fb->base)) {
> > + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
> > + ttm_bo_unreserve(&bo->ttm);
> > + ret = -EINVAL;
> > + goto err;
> > + }
> > + bo->has_sealed_pat_index = true;
>
> That needs to happen when the FB is created, otherwise
> someone can come in afterwards and still frob the PAT
> and then you're left with a FB that can not be used.
Hmm, and there's already some kind of XE_BO_SCANOUT flag
that seems to maybe do similar things? But that one seems
to be intended to be set when creating the bo, but then it
also gets abused internally by intel_fb_bo_framebuffer_init().
Seems to be a total mess.
>
> > + }
> > +
> > if (IS_DGFX(xe))
> > ret = xe_bo_migrate(bo, XE_PL_VRAM0);
> > else
> > @@ -308,6 +328,7 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
> > ttm_bo_unpin(&bo->ttm);
> > ttm_bo_unreserve(&bo->ttm);
> > err:
> > + bo->has_sealed_pat_index = false;
> > kfree(vma);
> > return ERR_PTR(ret);
> > }
> > @@ -323,6 +344,8 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
> > vma->bo->ggtt_node.start != vma->node.start)
> > xe_ggtt_remove_node(ggtt, &vma->node);
> >
> > + vma->bo->has_sealed_pat_index = false;
> > +
> > ttm_bo_reserve(&vma->bo->ttm, false, false, NULL);
> > ttm_bo_unpin(&vma->bo->ttm);
> > ttm_bo_unreserve(&vma->bo->ttm);
> > --
> > 2.25.1
>
> --
> Ville Syrjälä
> Intel
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2024-01-31 12:09 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-01-18 15:27 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 1/4] drm/xe: add bind time pat index to xe_bo structure Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 2/4] drm/xe: store bind time pat index to xe_bo Juha-Pekka Heikkila
2024-01-19 15:45 ` Matthew Auld
2024-01-22 18:26 ` Juha-Pekka Heikkila
2024-01-23 12:59 ` Matthew Auld
2024-01-23 8:05 ` Ville Syrjälä
2024-01-23 9:17 ` Matthew Auld
2024-01-18 15:27 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
2024-01-19 11:48 ` Jani Nikula
2024-01-19 12:08 ` Juha-Pekka Heikkila
2024-01-19 15:22 ` Matthew Auld
2024-01-22 18:27 ` Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4 Juha-Pekka Heikkila
2024-01-19 12:15 ` Kahola, Mika
2024-01-18 22:45 ` ✗ Fi.CI.BAT: failure for Enable ccs compressed framebuffers on Xe2 Patchwork
2024-01-19 8:57 ` ✓ Fi.CI.BAT: success for Enable ccs compressed framebuffers on Xe2 (rev2) Patchwork
2024-01-19 13:34 ` ✗ Fi.CI.IGT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2024-01-30 19:36 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
2024-01-30 19:36 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
2024-01-31 11:40 ` Ville Syrjälä
2024-01-31 12:09 ` Ville Syrjälä
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