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From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v5 02/10] drm/i915/guc: Add XE_LP registers for GuC error state capture.
Date: Thu, 27 Jan 2022 11:30:37 +0200	[thread overview]
Message-ID: <875yq5y18i.fsf@intel.com> (raw)
In-Reply-To: <75e98802660a5cdde9339b91f22e3f2cdb6fe343.camel@intel.com>

On Wed, 26 Jan 2022, "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com> wrote:
> Thanks Jani for taking the time to review... 
>
> 1. apologies on the const issue, this is my bad, i think it was
> one of the comments from earlier rev not sure how i missed it.
> Will fix this on next rev.
>
> 2. I do have a question below on the const for one of specific types
> of tables. Need your thoughts
>
> ...alan
>
>
> On Wed, 2022-01-26 at 20:13 +0200, Jani Nikula wrote:
>> On Wed, 26 Jan 2022, Alan Previn <alan.previn.teres.alexis@intel.com> wrote:
>> > Add device specific tables and register lists to cover different engines
>> > class types for GuC error state capture for XE_LP products.
>> > 
> ...
>
>> > +static struct __ext_steer_reg xelpd_extregs[] = {
>> > +	{"GEN7_SAMPLER_INSTDONE", GEN7_SAMPLER_INSTDONE},
>> > +	{"GEN7_ROW_INSTDONE", GEN7_ROW_INSTDONE}
>> > +};
>> 
>> Either this needs to be const or, if it needs to be mutable, moved to
>> device specific data.
>> 
>> Ditto for all such things all over the place.
>> 
>> BR,
>> Jani.
>
>
> I had a question though... the list of registers like the one above as well
> as below shall be made const... however, the table-of-lists (see farther down), contains a pointer to "extended_regs"
> that shall be allocated at startup - is it okay for that list to remain non-const
> since the others with actual register offsets remain const?

A static mutable array like this is module or driver specific. Your
allocation is device specific.

Sure, you have a check in there with /* already populated */ comment on
the module specific data to avoid allocating it multiple times.

Now, consider probing two devices with different properties. The latter
one will use the stuff you allocated for the first device. It will get
really tricky really quickly.

Pretty much the rule is no static (or global) non-const data for
anything. We do have to make some exceptions, but every one of them adds
to the burden of checking if they're going to be a problem, maybe later
on if not right now. So it's not so much about being const per se, it's
about ensuring we don't screw up with device specific data.


BR,
Jani.


>
> Alan: will add const for this and above tables:
> 	static struct __guc_mmio_reg_descr xe_lpd_global_regs[] = {
> 		COMMON_BASE_GLOBAL(),
> 		COMMON_GEN9BASE_GLOBAL(),
> 		COMMON_GEN12BASE_GLOBAL(),
> 	};
>
> Is this okay to not be const?:
> 	static struct __guc_mmio_reg_descr_group default_lists[] = {
> 		MAKE_REGLIST(default_global_regs, PF, GLOBAL, 0),
> 		MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
> 		MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS),
> 		MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
> 		MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
> 		MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
> 		MAKE_REGLIST(xe_lpd_vec_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEOENHANCE_CLASS),
> 		MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_BLITTER_CLASS),
> 		MAKE_REGLIST(xe_lpd_blt_inst_regs, PF, ENGINE_INSTANCE, GUC_BLITTER_CLASS),
> 		{}
> 	};
>
>

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2022-01-27  9:30 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-26 10:48 [Intel-gfx] [PATCH v5 00/10] Add GuC Error Capture Support Alan Previn
2022-01-26 10:48 ` [Intel-gfx] [PATCH v5 01/10] drm/i915/guc: Update GuC ADS size for error capture lists Alan Previn
2022-01-26 18:09   ` Jani Nikula
2022-01-26 18:15   ` Jani Nikula
2022-01-26 22:46   ` Lucas De Marchi
2022-02-03 19:03     ` Matthew Brost
2022-02-03 20:04       ` Lucas De Marchi
2022-02-03 20:37         ` Teres Alexis, Alan Previn
2022-02-03 20:40           ` Teres Alexis, Alan Previn
2022-02-03 21:40             ` Lucas De Marchi
2022-02-03 21:58               ` Teres Alexis, Alan Previn
2022-01-26 10:48 ` [Intel-gfx] [PATCH v5 02/10] drm/i915/guc: Add XE_LP registers for GuC error state capture Alan Previn
2022-01-26 18:13   ` Jani Nikula
2022-01-26 21:46     ` Teres Alexis, Alan Previn
2022-01-27  9:30       ` Jani Nikula [this message]
2022-01-28 16:54         ` Teres Alexis, Alan Previn
2022-01-26 10:48 ` [Intel-gfx] [PATCH v5 03/10] drm/i915/guc: Add DG2 " Alan Previn
2022-02-05  1:28   ` Umesh Nerlige Ramappa
2022-02-10  5:17     ` Teres Alexis, Alan Previn
2022-02-11 19:24     ` Teres Alexis, Alan Previn
2022-01-26 10:48 ` [Intel-gfx] [PATCH v5 04/10] drm/i915/guc: Add Gen9 " Alan Previn
2022-02-07 19:14   ` Umesh Nerlige Ramappa
2022-01-26 10:48 ` [Intel-gfx] [PATCH v5 05/10] drm/i915/guc: Add GuC's error state capture output structures Alan Previn
2022-01-26 10:48 ` [Intel-gfx] [PATCH v5 06/10] drm/i915/guc: Update GuC's log-buffer-state access for error capture Alan Previn
2022-01-27  4:26   ` Teres Alexis, Alan Previn
2022-02-04 18:19   ` Matthew Brost
2022-02-08 19:38     ` Teres Alexis, Alan Previn
2022-02-08 22:18       ` Matthew Brost
2022-02-08 22:55         ` Teres Alexis, Alan Previn
2022-02-09  3:34           ` Matthew Brost
2022-02-09  3:41             ` Matthew Brost
2022-02-09  3:51             ` Teres Alexis, Alan Previn
2022-02-14 19:20               ` Teres Alexis, Alan Previn
2022-02-15  1:22                 ` Teres Alexis, Alan Previn
2022-01-26 10:48 ` [Intel-gfx] [PATCH v5 07/10] drm/i915/guc: Extract GuC error capture lists on G2H notification Alan Previn
2022-02-11  1:36   ` Umesh Nerlige Ramappa
2022-02-13 19:47     ` Teres Alexis, Alan Previn
2022-02-17 19:21       ` Umesh Nerlige Ramappa
2022-02-25  7:21         ` Teres Alexis, Alan Previn
2022-01-26 10:48 ` [Intel-gfx] [PATCH v5 08/10] drm/i915/guc: Plumb GuC-capture into gpu_coredump Alan Previn
2022-02-11  2:11   ` Umesh Nerlige Ramappa
2022-02-12  0:31     ` Teres Alexis, Alan Previn
2022-02-12  0:38     ` Teres Alexis, Alan Previn
2022-01-26 10:48 ` [Intel-gfx] [PATCH v5 09/10] drm/i915/guc: Follow legacy register names Alan Previn
2022-02-03 19:09   ` Matthew Brost
2022-02-04 18:53     ` Teres Alexis, Alan Previn
2022-01-26 10:48 ` [Intel-gfx] [PATCH v5 10/10] drm/i915/guc: Print the GuC error capture output register list Alan Previn
2022-02-07 21:43   ` Umesh Nerlige Ramappa
2022-01-26 18:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add GuC Error Capture Support (rev5) Patchwork
2022-01-26 18:52 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-01-26 19:25 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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