[PATCH 1/2] drm/i915/gen9: don't call skl_pipe_pixel_rate() twice on the same function

[PATCH 1/2] drm/i915/gen9: don't call skl_pipe_pixel_rate() twice on the same function

[Paulo Zanoni]

One day this function will have a complete implementation which won't
be a simple one-line return, so avoid unnecessarily calling it when we
can just store the value in a variable.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fe6c1c6..3a6df2f 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3739,14 +3739,18 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv,
 static uint32_t
 skl_compute_linetime_wm(struct intel_crtc_state *cstate)
 {
+	uint32_t pixel_rate;
+
 	if (!cstate->base.active)
 		return 0;
 
-	if (WARN_ON(skl_pipe_pixel_rate(cstate) == 0))
+	pixel_rate = skl_pipe_pixel_rate(cstate);
+
+	if (WARN_ON(pixel_rate == 0))
 		return 0;
 
 	return DIV_ROUND_UP(8 * cstate->base.adjusted_mode.crtc_htotal * 1000,
-			    skl_pipe_pixel_rate(cstate));
+			    pixel_rate);
 }
 
 static void skl_compute_transition_wm(struct intel_crtc_state *cstate,
-- 
2.7.4

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[PATCH 2/2] drm/i915/gen9: fix watermarks when using the pipe scaler

[Paulo Zanoni]

Luckily, the necessary adjustments for when we're using the scaler are
exactly the same as the ones needed on ILK+, so just reuse the
function we already have.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 3a6df2f..62d730d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3470,12 +3470,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
 	return 0;
 }
 
-static uint32_t skl_pipe_pixel_rate(const struct intel_crtc_state *config)
-{
-	/* TODO: Take into account the scalers once we support them */
-	return config->base.adjusted_mode.crtc_clock;
-}
-
 /*
  * The max latency should be 257 (max the punit can code is 255 and we add 2us
  * for the read latency) and cpp should always be <= 8, so that
@@ -3526,7 +3520,7 @@ static uint32_t skl_adjusted_plane_pixel_rate(const struct intel_crtc_state *cst
 	 * Adjusted plane pixel rate is just the pipe's adjusted pixel rate
 	 * with additional adjustments for plane-specific scaling.
 	 */
-	adjusted_pixel_rate = skl_pipe_pixel_rate(cstate);
+	adjusted_pixel_rate = ilk_pipe_pixel_rate(cstate);
 	downscale_amount = skl_plane_downscale_amount(pstate);
 
 	pixel_rate = adjusted_pixel_rate * downscale_amount >> 16;
@@ -3744,7 +3738,7 @@ skl_compute_linetime_wm(struct intel_crtc_state *cstate)
 	if (!cstate->base.active)
 		return 0;
 
-	pixel_rate = skl_pipe_pixel_rate(cstate);
+	pixel_rate = ilk_pipe_pixel_rate(cstate);
 
 	if (WARN_ON(pixel_rate == 0))
 		return 0;
-- 
2.7.4

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Re: [PATCH 2/2] drm/i915/gen9: fix watermarks when using the pipe scaler

[Zanoni, Paulo R]

Em Sex, 2016-10-07 às 17:13 -0300, Paulo Zanoni escreveu:
> Luckily, the necessary adjustments for when we're using the scaler
> are
> exactly the same as the ones needed on ILK+, so just reuse the
> function we already have.

Now that I sent it, I realized that I should just have inverted the
patch order so patch 1 could be Cc:stable to ease backporting...

> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 10 ++--------
>  1 file changed, 2 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 3a6df2f..62d730d 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3470,12 +3470,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state
> *cstate,
>  	return 0;
>  }
>  
> -static uint32_t skl_pipe_pixel_rate(const struct intel_crtc_state
> *config)
> -{
> -	/* TODO: Take into account the scalers once we support them
> */
> -	return config->base.adjusted_mode.crtc_clock;
> -}
> -
>  /*
>   * The max latency should be 257 (max the punit can code is 255 and
> we add 2us
>   * for the read latency) and cpp should always be <= 8, so that
> @@ -3526,7 +3520,7 @@ static uint32_t
> skl_adjusted_plane_pixel_rate(const struct intel_crtc_state *cst
>  	 * Adjusted plane pixel rate is just the pipe's adjusted
> pixel rate
>  	 * with additional adjustments for plane-specific scaling.
>  	 */
> -	adjusted_pixel_rate = skl_pipe_pixel_rate(cstate);
> +	adjusted_pixel_rate = ilk_pipe_pixel_rate(cstate);
>  	downscale_amount = skl_plane_downscale_amount(pstate);
>  
>  	pixel_rate = adjusted_pixel_rate * downscale_amount >> 16;
> @@ -3744,7 +3738,7 @@ skl_compute_linetime_wm(struct intel_crtc_state
> *cstate)
>  	if (!cstate->base.active)
>  		return 0;
>  
> -	pixel_rate = skl_pipe_pixel_rate(cstate);
> +	pixel_rate = ilk_pipe_pixel_rate(cstate);
>  
>  	if (WARN_ON(pixel_rate == 0))
>  		return 0;
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Re: [PATCH 2/2] drm/i915/gen9: fix watermarks when using the pipe scaler

[Jani Nikula]

On Fri, 07 Oct 2016, "Zanoni, Paulo R" <paulo.r.zanoni@intel.com> wrote:
> Em Sex, 2016-10-07 às 17:13 -0300, Paulo Zanoni escreveu:
>> Luckily, the necessary adjustments for when we're using the scaler
>> are
>> exactly the same as the ones needed on ILK+, so just reuse the
>> function we already have.
>
> Now that I sent it, I realized that I should just have inverted the
> patch order so patch 1 could be Cc:stable to ease backporting...

Seems to me patch 1/2 is also useful for backporting if patch 2/2 gets
backported. cc: stable to both, with the dependency added to patch 2/2
when we have the commit id for 1/2 (done while applying).

Documentation/stable_kernel_rules.txt:

"""
Additionally, some patches submitted via Option 1 may have additional patch
prerequisites which can be cherry-picked. This can be specified in the following
format in the sign-off area:

     Cc: <stable@vger.kernel.org> # 3.3.x: a1f84a3: sched: Check for idle
     Cc: <stable@vger.kernel.org> # 3.3.x: 1b9508f: sched: Rate-limit newidle
     Cc: <stable@vger.kernel.org> # 3.3.x: fd21073: sched: Fix affinity logic
     Cc: <stable@vger.kernel.org> # 3.3.x
    Signed-off-by: Ingo Molnar <mingo@elte.hu>

   The tag sequence has the meaning of:
     git cherry-pick a1f84a3
     git cherry-pick 1b9508f
     git cherry-pick fd21073
     git cherry-pick <this commit>
"""

BR,
Jani.

>
>> 
>> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_pm.c | 10 ++--------
>>  1 file changed, 2 insertions(+), 8 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c
>> b/drivers/gpu/drm/i915/intel_pm.c
>> index 3a6df2f..62d730d 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -3470,12 +3470,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state
>> *cstate,
>>  	return 0;
>>  }
>>  
>> -static uint32_t skl_pipe_pixel_rate(const struct intel_crtc_state
>> *config)
>> -{
>> -	/* TODO: Take into account the scalers once we support them
>> */
>> -	return config->base.adjusted_mode.crtc_clock;
>> -}
>> -
>>  /*
>>   * The max latency should be 257 (max the punit can code is 255 and
>> we add 2us
>>   * for the read latency) and cpp should always be <= 8, so that
>> @@ -3526,7 +3520,7 @@ static uint32_t
>> skl_adjusted_plane_pixel_rate(const struct intel_crtc_state *cst
>>  	 * Adjusted plane pixel rate is just the pipe's adjusted
>> pixel rate
>>  	 * with additional adjustments for plane-specific scaling.
>>  	 */
>> -	adjusted_pixel_rate = skl_pipe_pixel_rate(cstate);
>> +	adjusted_pixel_rate = ilk_pipe_pixel_rate(cstate);
>>  	downscale_amount = skl_plane_downscale_amount(pstate);
>>  
>>  	pixel_rate = adjusted_pixel_rate * downscale_amount >> 16;
>> @@ -3744,7 +3738,7 @@ skl_compute_linetime_wm(struct intel_crtc_state
>> *cstate)
>>  	if (!cstate->base.active)
>>  		return 0;
>>  
>> -	pixel_rate = skl_pipe_pixel_rate(cstate);
>> +	pixel_rate = ilk_pipe_pixel_rate(cstate);
>>  
>>  	if (WARN_ON(pixel_rate == 0))
>>  		return 0;
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
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✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915/gen9: don't call skl_pipe_pixel_rate() twice on the same function

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/gen9: don't call skl_pipe_pixel_rate() twice on the same function
URL   : https://patchwork.freedesktop.org/series/13464/
State : warning

== Summary ==

Series 13464v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/13464/revisions/1/mbox/

Test kms_psr_sink_crc:
        Subgroup psr_basic:
                dmesg-warn -> PASS       (fi-skl-6700hq)
Test vgem_basic:
        Subgroup unload:
                skip       -> PASS       (fi-ivb-3770)
                pass       -> SKIP       (fi-skl-6700hq)
                skip       -> PASS       (fi-skl-6700k)
                pass       -> SKIP       (fi-ilk-650)
                pass       -> SKIP       (fi-skl-6260u)
                skip       -> PASS       (fi-byt-n2820)

fi-bdw-5557u     total:248  pass:231  dwarn:0   dfail:0   fail:0   skip:17 
fi-bsw-n3050     total:248  pass:204  dwarn:0   dfail:0   fail:0   skip:44 
fi-bxt-t5700     total:248  pass:217  dwarn:0   dfail:0   fail:0   skip:31 
fi-byt-j1900     total:248  pass:214  dwarn:1   dfail:0   fail:1   skip:32 
fi-byt-n2820     total:248  pass:211  dwarn:0   dfail:0   fail:1   skip:36 
fi-hsw-4770      total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-hsw-4770r     total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-ilk-650       total:248  pass:184  dwarn:0   dfail:0   fail:2   skip:62 
fi-ivb-3520m     total:248  pass:221  dwarn:0   dfail:0   fail:0   skip:27 
fi-ivb-3770      total:248  pass:208  dwarn:0   dfail:0   fail:0   skip:40 
fi-kbl-7200u     total:248  pass:222  dwarn:0   dfail:0   fail:0   skip:26 
fi-skl-6260u     total:248  pass:232  dwarn:0   dfail:0   fail:0   skip:16 
fi-skl-6700hq    total:248  pass:224  dwarn:0   dfail:0   fail:0   skip:24 
fi-skl-6700k     total:248  pass:222  dwarn:1   dfail:0   fail:0   skip:25 
fi-skl-6770hq    total:248  pass:231  dwarn:1   dfail:0   fail:1   skip:15 
fi-snb-2520m     total:248  pass:211  dwarn:0   dfail:0   fail:0   skip:37 
fi-snb-2600      total:248  pass:209  dwarn:0   dfail:0   fail:0   skip:39 

Results at /archive/results/CI_IGT_test/Patchwork_2654/

f35ed31aea66b3230c366fcba5f3456ae2cb956e drm-intel-nightly: 2016y-10m-10d-11h-28m-51s UTC integration manifest
0bb92db drm/i915/gen9: fix watermarks when using the pipe scaler
b7a6ac9 drm/i915/gen9: don't call skl_pipe_pixel_rate() twice on the same function

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