From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 8/8] drm/i915: Show waiters in i915_hangcheck_info
Date: Tue, 04 Oct 2016 15:41:24 +0300 [thread overview]
Message-ID: <8760p8477v.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20161003125246.17686-8-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
The commit message is missing.
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 9c95ce73f2aa..39b76c24c84f 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1343,6 +1343,9 @@ static int i915_hangcheck_info(struct seq_file *m, void *unused)
> seq_printf(m, "Hangcheck inactive\n");
>
> for_each_engine_id(engine, dev_priv, id) {
> + struct intel_breadcrumbs *b = &engine->breadcrumbs;
> + struct rb_node *rb;
> +
> seq_printf(m, "%s:\n", engine->name);
> seq_printf(m, "\tseqno = %x [current %x, last %x]\n",
> engine->hangcheck.seqno,
> @@ -1352,6 +1355,15 @@ static int i915_hangcheck_info(struct seq_file *m, void *unused)
> yesno(intel_engine_has_waiter(engine)),
> yesno(test_bit(engine->id,
> &dev_priv->gpu_error.missed_irq_rings)));
> + spin_lock(&b->lock);
> + for (rb = rb_first(&b->waiters); rb; rb = rb_next(rb)) {
The waiters are embeddded in requests? So we need the rcu_read_lock?
-Mika
> + struct intel_wait *w = container_of(rb, typeof(*w), node);
> +
> + seq_printf(m, "\t%s [%d] waiting for %x\n",
> + w->tsk->comm, w->tsk->pid, w->seqno);
> + }
> + spin_unlock(&b->lock);
> +
> seq_printf(m, "\tACTHD = 0x%08llx [current 0x%08llx]\n",
> (long long)engine->hangcheck.acthd,
> (long long)acthd[id]);
> --
> 2.9.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2016-10-04 12:42 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-03 12:52 [PATCH 1/8] drm/i915: Share the computation of ring size for RING_CTL register Chris Wilson
2016-10-03 12:52 ` [PATCH 2/8] drm/i915/execlists: Reinitialise context image after GPU hang Chris Wilson
2016-10-03 12:52 ` [PATCH 3/8] drm/i915/execlists: Move clearing submission count from reset to init Chris Wilson
2016-10-03 13:07 ` Mika Kuoppala
2016-10-03 12:52 ` [PATCH 4/8] drm/i915: Disable irqs across GPU reset Chris Wilson
2016-10-03 13:09 ` Mika Kuoppala
2016-10-03 12:52 ` [PATCH 5/8] drm/i915: Double check hangcheck.seqno after reset Chris Wilson
2016-10-03 13:14 ` Mika Kuoppala
2016-10-03 14:01 ` Chris Wilson
2016-10-03 12:52 ` [PATCH 6/8] drm/i915: Show bounds of active request in the ring on GPU hang Chris Wilson
2016-10-04 11:56 ` Mika Kuoppala
2016-10-03 12:52 ` [PATCH 7/8] drm/i915: Show RING registers through debugfs Chris Wilson
2016-10-04 12:35 ` Mika Kuoppala
2016-10-04 13:11 ` Chris Wilson
2016-10-03 12:52 ` [PATCH 8/8] drm/i915: Show waiters in i915_hangcheck_info Chris Wilson
2016-10-04 12:41 ` Mika Kuoppala [this message]
2016-10-04 13:07 ` Chris Wilson
2016-10-04 13:22 ` Mika Kuoppala
2016-10-03 13:00 ` [PATCH 1/8] drm/i915: Share the computation of ring size for RING_CTL register Chris Wilson
2016-10-04 12:51 ` Mika Kuoppala
2016-10-03 13:01 ` Mika Kuoppala
2016-10-03 14:49 ` ✗ Fi.CI.BAT: warning for series starting with [1/8] " Patchwork
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