public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/16] drm/i915/bxt: Reject DMC firmware versions with known bugs
Date: Mon, 11 Apr 2016 15:39:39 +0300	[thread overview]
Message-ID: <8760vopbec.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <1459515767-29228-2-git-send-email-imre.deak@intel.com>

Imre Deak <imre.deak@intel.com> writes:

> [ text/plain ]
> DMC version 1.06 has a known bug, where the firmware polls forever for a port
> PLL to lock, if the PLL was disabled when entering DC5. Version 1.07 fixes
> this, so make that the minimum required version on BXT.
>

If this would be for already released hw, we would need to be
more descriptive about the symptoms. Like 'it hangs the box'.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>


> CC: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_csr.c | 20 +++++++++++++++-----
>  1 file changed, 15 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
> index 3f57cb9..d57b00e 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -50,6 +50,7 @@ MODULE_FIRMWARE(I915_CSR_SKL);
>  MODULE_FIRMWARE(I915_CSR_BXT);
>  
>  #define SKL_CSR_VERSION_REQUIRED	CSR_VERSION(1, 23)
> +#define BXT_CSR_VERSION_REQUIRED	CSR_VERSION(1, 7)
>  
>  #define CSR_MAX_FW_SIZE			0x2FFF
>  #define CSR_DEFAULT_FW_OFFSET		0xFFFFFFFF
> @@ -281,6 +282,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
>  	uint32_t dmc_offset = CSR_DEFAULT_FW_OFFSET, readcount = 0, nbytes;
>  	uint32_t i;
>  	uint32_t *dmc_payload;
> +	uint32_t required_min_version;
>  
>  	if (!fw)
>  		return NULL;
> @@ -296,15 +298,23 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
>  
>  	csr->version = css_header->version;
>  
> -	if ((IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) &&
> -	    csr->version < SKL_CSR_VERSION_REQUIRED) {
> -		DRM_INFO("Refusing to load old Skylake DMC firmware v%u.%u,"
> +	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
> +		required_min_version = SKL_CSR_VERSION_REQUIRED;
> +	} else if (IS_BROXTON(dev_priv)) {
> +		required_min_version = BXT_CSR_VERSION_REQUIRED;
> +	} else {
> +		MISSING_CASE(INTEL_REVID(dev_priv));
> +		required_min_version = 0;
> +	}
> +
> +	if (csr->version < required_min_version) {
> +		DRM_INFO("Refusing to load old DMC firmware v%u.%u,"
>  			 " please upgrade to v%u.%u or later"
>  			   " [" FIRMWARE_URL "].\n",
>  			 CSR_VERSION_MAJOR(csr->version),
>  			 CSR_VERSION_MINOR(csr->version),
> -			 CSR_VERSION_MAJOR(SKL_CSR_VERSION_REQUIRED),
> -			 CSR_VERSION_MINOR(SKL_CSR_VERSION_REQUIRED));
> +			 CSR_VERSION_MAJOR(required_min_version),
> +			 CSR_VERSION_MINOR(required_min_version));
>  		return NULL;
>  	}
>  
> -- 
> 2.5.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-04-11 12:41 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-01 13:02 [PATCH 00/16] drm/i915/bxt: Fix/enable display power well support/runtime PM Imre Deak
2016-04-01 13:02 ` [PATCH 01/16] drm/i915/bxt: Reject DMC firmware versions with known bugs Imre Deak
2016-04-11 12:39   ` Mika Kuoppala [this message]
2016-04-01 13:02 ` [PATCH 02/16] drm/i915/bxt: Fix GRC code register field definitions Imre Deak
2016-04-08 17:22   ` Ville Syrjälä
2016-04-08 17:27     ` Imre Deak
2016-04-01 13:02 ` [PATCH 03/16] drm/i915/bxt: Add a note about BXT_PORT_CL1CM_DW30 being read-only Imre Deak
2016-04-08 18:02   ` Ville Syrjälä
2016-04-08 18:12     ` Imre Deak
2016-04-08 18:16       ` Imre Deak
2016-04-12 15:11   ` David Weinehall
2016-04-01 13:02 ` [PATCH 04/16] drm/i915/bxt: Reset secondary power well requests left on by DMC/KVMR Imre Deak
2016-04-05 10:26   ` [PATCH v2 04/16] drm/i915/gen9: " Imre Deak
2016-04-06 10:59     ` Patrik Jakobsson
2016-04-01 13:02 ` [PATCH 05/16] drm/i915/gen9: Make power well disabling synchronous Imre Deak
2016-04-04 10:34   ` Patrik Jakobsson
2016-04-05  8:26     ` Patrik Jakobsson
2016-04-05  9:30       ` Imre Deak
2016-04-01 13:02 ` [PATCH 06/16] drm/i915/gen9: Fix DMC/DC state asserts Imre Deak
2016-04-04 10:52   ` Patrik Jakobsson
2016-04-01 13:02 ` [PATCH 07/16] drm/i915/bxt: Suspend power domains during suspend-to-idle Imre Deak
2016-04-04 11:28   ` Patrik Jakobsson
2016-04-01 13:02 ` [PATCH 08/16] drm/i915/skl: Unexport skl_pw1_misc_io_init Imre Deak
2016-04-04 12:30   ` Patrik Jakobsson
2016-04-04 12:34     ` Imre Deak
2016-04-04 12:42   ` [PATCH v2 " Imre Deak
2016-04-04 13:01     ` Patrik Jakobsson
2016-04-04 13:54       ` Imre Deak
2016-04-01 13:02 ` [PATCH 09/16] drm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK helpers Imre Deak
2016-04-08 18:03   ` Ville Syrjälä
2016-04-12 15:12   ` David Weinehall
2016-04-01 13:02 ` [PATCH 10/16] drm/i915/bxt: Power down DDI PHYs separately during the per PHY uninit Imre Deak
2016-04-01 13:29   ` Jani Nikula
2016-04-01 13:40     ` Imre Deak
2016-04-08 18:04   ` Ville Syrjälä
2016-04-01 13:02 ` [PATCH 11/16] drm/i915/bxt: Don't toggle power well 1 on-demand Imre Deak
2016-04-08 18:10   ` Ville Syrjälä
2016-04-01 13:02 ` [PATCH 12/16] drm/i915/bxt: Sanitize the DBUF HW state together with CDCLK Imre Deak
2016-04-11 13:19   ` Mika Kuoppala
2016-04-01 13:02 ` [PATCH 13/16] drm/i915/bxt: Don't reprogram an already enabled DDI PHY Imre Deak
2016-04-08 18:15   ` Ville Syrjälä
2016-04-01 13:02 ` [PATCH 14/16] drm/i915/bxt: Add HW state verification for DDI PHY and CDCLK Imre Deak
2016-04-01 14:28   ` [PATCH v2 " Imre Deak
2016-04-04 14:27     ` [PATCH v3 " Imre Deak
2016-04-12 15:21       ` David Weinehall
2016-04-01 13:02 ` [PATCH 15/16] Revert "drm/i915/bxt: Disable power well support" Imre Deak
2016-04-12 15:22   ` David Weinehall
2016-04-01 13:02 ` [PATCH 16/16] drm/i915/bxt: Enable runtime PM Imre Deak
2016-04-12 15:21   ` David Weinehall
2016-04-01 13:45 ` ✗ Fi.CI.BAT: failure for drm/i915/bxt: Fix/enable display power well support/runtime PM Patchwork
2016-04-01 14:35 ` ✓ Fi.CI.BAT: success for drm/i915/bxt: Fix/enable display power well support/runtime PM (rev2) Patchwork
2016-04-04 14:07 ` ✗ Fi.CI.BAT: failure for drm/i915/bxt: Fix/enable display power well support/runtime PM (rev3) Patchwork
2016-04-04 15:56 ` ✗ Fi.CI.BAT: failure for drm/i915/bxt: Fix/enable display power well support/runtime PM (rev4) Patchwork
2016-04-05 12:19 ` ✓ Fi.CI.BAT: success for drm/i915/bxt: Fix/enable display power well support/runtime PM (rev5) Patchwork
2016-04-15 12:06   ` Imre Deak

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=8760vopbec.fsf@gaia.fi.intel.com \
    --to=mika.kuoppala@linux.intel.com \
    --cc=imre.deak@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox