From: Jani Nikula <jani.nikula@intel.com>
To: Ramalingam C <ramalingam.c@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/i915: Sharing the pixel_format_from_vbt to whole i915
Date: Wed, 06 Apr 2016 14:37:30 +0300 [thread overview]
Message-ID: <8760vvx91h.fsf@intel.com> (raw)
In-Reply-To: <1459345998-14148-1-git-send-email-ramalingam.c@intel.com>
On Wed, 30 Mar 2016, Ramalingam C <ramalingam.c@intel.com> wrote:
> Shared the function pixel_format_from_vbt for whole display module.
> Function declaration is added to intel_dsi.h.
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dsi.h | 1 +
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 2 +-
> 2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
> index ec58ead..9612916 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -126,6 +126,7 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
> return container_of(encoder, struct intel_dsi, base.base);
> }
>
> +enum mipi_dsi_pixel_format pixel_format_from_vbt(u32 fmt);
> bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
> extern void intel_enable_dsi_pll(struct intel_encoder *encoder);
> extern void intel_disable_dsi_pll(struct intel_encoder *encoder);
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index 8302a97..d78d59c 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -413,7 +413,7 @@ static const struct drm_panel_funcs vbt_panel_funcs = {
> };
>
> /* XXX: This should be done when parsing the VBT in intel_bios.c */
> -static enum mipi_dsi_pixel_format pixel_format_from_vbt(u32 fmt)
> +enum mipi_dsi_pixel_format pixel_format_from_vbt(u32 fmt)
I think this one ends up being nicer if you move the whole function to
intel_dsi.c and name it according to being a function to convert the
pixel format from the *register* data, not vbt.
BR,
Jani.
> {
> /* It just so happens the VBT matches register contents. */
> switch (fmt) {
--
Jani Nikula, Intel Open Source Technology Center
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next prev parent reply other threads:[~2016-04-06 11:37 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-29 17:34 [PATCH 1/2] drm/i915/BXT: Get pipe conf from the port registers Ramalingam C
2016-03-29 17:34 ` [PATCH 2/2] drm/i915/BXT: Tolerance at BXT DSI pipe_config comparison Ramalingam C
2016-03-29 18:28 ` kbuild test robot
2016-03-30 11:03 ` Jani Nikula
2016-03-30 11:32 ` Daniel Vetter
2016-03-30 14:19 ` Ramalingam C
2016-03-30 19:04 ` Daniel Vetter
2016-04-04 15:43 ` Ramalingam C
2016-04-05 8:30 ` Jani Nikula
2016-04-05 9:40 ` Ramalingam C
2016-04-13 10:06 ` Daniel Vetter
2016-04-13 11:06 ` Jani Nikula
2016-04-13 11:48 ` Daniel Vetter
2016-04-13 11:57 ` Daniel Vetter
2016-04-13 13:04 ` Ramalingam C
2016-04-13 14:46 ` Daniel Vetter
2016-04-15 10:57 ` Ramalingam C
2016-04-19 10:30 ` Ramalingam C
2016-04-13 10:05 ` Daniel Vetter
2016-03-30 6:14 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/BXT: Get pipe conf from the port registers Patchwork
2016-03-30 10:43 ` [PATCH 1/2] " Jani Nikula
2016-03-30 13:28 ` Ramalingam C
2016-03-30 13:53 ` [PATCH 1/2] drm/i915: Sharing the pixel_format_from_vbt to whole i915 Ramalingam C
2016-03-30 13:53 ` [PATCH 2/2] drm/i915/BXT: Get pipe conf from the port registers Ramalingam C
2016-04-04 9:18 ` Ramalingam C
2016-04-06 11:45 ` Jani Nikula
2016-04-06 11:37 ` Jani Nikula [this message]
2016-03-31 12:51 ` ✗ Fi.CI.BAT: failure for series starting with [2/2] drm/i915/BXT: Get pipe conf from the port registers (rev3) Patchwork
-- strict thread matches above, loose matches on Subject: below --
2016-04-07 9:06 [PATCH 1/2] drm/i915: Sharing the pixel_format_from_vbt to whole i915 Ramalingam C
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