From: Jani Nikula <jani.nikula@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Deepak S <deepak.s@intel.com>, Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 1/5] drm/i915/kbl: Add Kabylake PCI ID
Date: Tue, 06 Oct 2015 12:11:59 +0300 [thread overview]
Message-ID: <87612k9x9c.fsf@intel.com> (raw)
In-Reply-To: <1444085055-27447-2-git-send-email-rodrigo.vivi@intel.com>
On Tue, 06 Oct 2015, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> From: Deepak S <deepak.s@intel.com>
>
> v2: separate out device info into different GT (Damien)
> v3: Add is_kabylake to the KBL gt3 structuer (Damien)
> Sort the platforms in older -> newer order (Damien)
>
> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
> Signed-off-by: Deepak S <deepak.s@intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 33 ++++++++++++++++++++++++++++++++-
> drivers/gpu/drm/i915/i915_drv.h | 2 ++
> include/drm/i915_pciids.h | 29 +++++++++++++++++++++++++++++
> 3 files changed, 63 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 1cb6b82..f42102d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -394,6 +394,34 @@ static const struct intel_device_info intel_broxton_info = {
> IVB_CURSOR_OFFSETS,
> };
>
> +static const struct intel_device_info intel_kabylake_info = {
> + .is_preliminary = 1,
> + .is_skylake = 1,
> + .is_kabylake = 1,
> + .gen = 9, .num_pipes = 3,
> + .need_gfx_hws = 1, .has_hotplug = 1,
> + .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> + .has_llc = 1,
> + .has_ddi = 1,
> + .has_fbc = 1,
> + GEN_DEFAULT_PIPEOFFSETS,
> + IVB_CURSOR_OFFSETS,
> +};
> +
> +static const struct intel_device_info intel_kabylake_gt3_info = {
> + .is_preliminary = 1,
> + .is_skylake = 1,
> + .is_kabylake = 1,
> + .gen = 9, .num_pipes = 3,
> + .need_gfx_hws = 1, .has_hotplug = 1,
> + .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> + .has_llc = 1,
> + .has_ddi = 1,
> + .has_fbc = 1,
> + GEN_DEFAULT_PIPEOFFSETS,
> + IVB_CURSOR_OFFSETS,
> +};
> +
> /*
> * Make sure any device matches here are from most specific to most
> * general. For example, since the Quanta match is based on the subsystem
> @@ -434,7 +462,10 @@ static const struct intel_device_info intel_broxton_info = {
> INTEL_SKL_GT1_IDS(&intel_skylake_info), \
> INTEL_SKL_GT2_IDS(&intel_skylake_info), \
> INTEL_SKL_GT3_IDS(&intel_skylake_gt3_info), \
> - INTEL_BXT_IDS(&intel_broxton_info)
> + INTEL_BXT_IDS(&intel_broxton_info), \
> + INTEL_KBL_GT1_IDS(&intel_kabylake_info), \
> + INTEL_KBL_GT2_IDS(&intel_kabylake_info), \
> + INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info)
>
> static const struct pci_device_id pciidlist[] = { /* aka */
> INTEL_PCI_IDS,
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 824e724..f7e9d7e 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -765,6 +765,7 @@ struct intel_csr {
> func(is_valleyview) sep \
> func(is_haswell) sep \
> func(is_skylake) sep \
> + func(is_kabylake) sep \
> func(is_preliminary) sep \
> func(has_fbc) sep \
> func(has_pipe_cxsr) sep \
> @@ -2464,6 +2465,7 @@ struct drm_i915_cmd_table {
> #define IS_BROADWELL(dev) (!INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev))
> #define IS_SKYLAKE(dev) (INTEL_INFO(dev)->is_skylake)
> #define IS_BROXTON(dev) (!INTEL_INFO(dev)->is_skylake && IS_GEN9(dev))
> +#define IS_KABYLAKE(dev) (INTEL_INFO(dev)->is_kabylake)
> #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
> #define IS_HSW_EARLY_SDV(dev) (IS_HASWELL(dev) && \
> (INTEL_DEVID(dev) & 0xFF00) == 0x0C00)
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index 17c4456..2e7a159 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -291,4 +291,33 @@
> INTEL_VGA_DEVICE(0x1A84, info), \
> INTEL_VGA_DEVICE(0x5A84, info)
>
> +#define INTEL_KBL_GT1_IDS(info) \
> + INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \
> + INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \
> + INTEL_VGA_DEVICE(0x5917, info), /* DT GT1.5 */ \
> + INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
> + INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
> + INTEL_VGA_DEVICE(0x5902, info), /* DT GT1 */ \
> + INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
> + INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */
> +
> +#define INTEL_KBL_GT2_IDS(info) \
> + INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
> + INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
This will match IS_SKL_GT3, making it a good example of just how
confusing it will be to have IS_SKYLAKE match Kabylake.
> + INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
> + INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \
> + INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
> + INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
> + INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
> +
> +#define INTEL_KBL_GT3_IDS(info) \
> + INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \
> + INTEL_VGA_DEVICE(0x592B, info), /* Halo GT3 */ \
> + INTEL_VGA_DEVICE(0x592A, info) /* SRV GT3 */
> +
> +#define INTEL_KBL_IDS(info) \
> + INTEL_KBL_GT1_IDS(info), \
> + INTEL_KBL_GT2_IDS(info), \
> + INTEL_KBL_GT3_IDS(info)
> +
> #endif /* _I915_PCIIDS_H */
> --
> 2.4.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-10-06 9:08 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-05 22:44 [PATCH 0/5] Introduce Kabylake Support Rodrigo Vivi
2015-10-05 22:44 ` [PATCH 1/5] drm/i915/kbl: Add Kabylake PCI ID Rodrigo Vivi
2015-10-06 9:09 ` Jani Nikula
2015-10-06 17:31 ` Vivi, Rodrigo
2015-10-07 13:55 ` Daniel Vetter
2015-10-07 14:34 ` Ville Syrjälä
2015-10-06 19:59 ` Ville Syrjälä
2015-10-06 9:11 ` Jani Nikula [this message]
2015-10-05 22:44 ` [PATCH 2/5] drm/i915/kbl: Use propper ddi buffer translation table for Kabylake ULT and ULX Rodrigo Vivi
2015-10-05 22:44 ` [PATCH 3/5] drm/i915/kbl: Kabylake A0 is based on Skylake H0 Rodrigo Vivi
2015-10-06 9:24 ` Jani Nikula
2015-10-06 17:43 ` Vivi, Rodrigo
2015-10-06 20:51 ` Rodrigo Vivi
2015-10-06 21:09 ` Ben Widawsky
2015-10-07 8:07 ` Jani Nikula
2015-10-05 22:44 ` [PATCH 4/5] drm/i915/kbl: Fix DMC load on Kabylake Rodrigo Vivi
2015-10-05 22:44 ` [PATCH 5/5] drm/i915/kbl: drm/i915: Avoid GuC loading for now " Rodrigo Vivi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87612k9x9c.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=deepak.s@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=rodrigo.vivi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).