[PATCH v2 1/2] drm/i915/dsi: rename the current DSI files based on generation

[PATCH v2 1/2] drm/i915/dsi: rename the current DSI files based on generation

[Jani Nikula]

Starting from ICL or gen 11 we have a new DSI block which requires
completely different programming from the current implementation. Having
them in the same file would be confusing. Rename the current DSI and DSI
PLL implementation files as gen7_dsi.c and gen7_dsi_pll.c.

No functional changes.

References: https://patchwork.freedesktop.org/series/44823/
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/Makefile                            | 4 ++--
 drivers/gpu/drm/i915/{intel_dsi.c => gen7_dsi.c}         | 0
 drivers/gpu/drm/i915/{intel_dsi_pll.c => gen7_dsi_pll.c} | 0
 drivers/gpu/drm/i915/intel_drv.h                         | 2 +-
 drivers/gpu/drm/i915/intel_dsi.h                         | 4 ++--
 5 files changed, 5 insertions(+), 5 deletions(-)
 rename drivers/gpu/drm/i915/{intel_dsi.c => gen7_dsi.c} (100%)
 rename drivers/gpu/drm/i915/{intel_dsi_pll.c => gen7_dsi_pll.c} (100%)

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 4c6adae23e18..a1cfb3a3926b 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -135,15 +135,15 @@ i915-y += dvo_ch7017.o \
 	  dvo_ns2501.o \
 	  dvo_sil164.o \
 	  dvo_tfp410.o \
+	  gen7_dsi.o \
+	  gen7_dsi_pll.o \
 	  intel_crt.o \
 	  intel_ddi.o \
 	  intel_dp_aux_backlight.o \
 	  intel_dp_link_training.o \
 	  intel_dp_mst.o \
 	  intel_dp.o \
-	  intel_dsi.o \
 	  intel_dsi_dcs_backlight.o \
-	  intel_dsi_pll.o \
 	  intel_dsi_vbt.o \
 	  intel_dvo.o \
 	  intel_hdmi.o \
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/gen7_dsi.c
similarity index 100%
rename from drivers/gpu/drm/i915/intel_dsi.c
rename to drivers/gpu/drm/i915/gen7_dsi.c
diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/gen7_dsi_pll.c
similarity index 100%
rename from drivers/gpu/drm/i915/intel_dsi_pll.c
rename to drivers/gpu/drm/i915/gen7_dsi_pll.c
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index b9b70321c054..888a85dc3856 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1730,7 +1730,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector);
 /* intel_dp_mst.c */
 int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id);
 void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
-/* intel_dsi.c */
+/* gen7_dsi.c */
 void intel_dsi_init(struct drm_i915_private *dev_priv);
 
 /* intel_dsi_dcs_backlight.c */
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index 7afeb9580f41..1b5c2c167472 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -129,11 +129,11 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
 	return container_of(encoder, struct intel_dsi, base.base);
 }
 
-/* intel_dsi.c */
+/* gen7_dsi.c */
 void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
 enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
 
-/* intel_dsi_pll.c */
+/* gen7_dsi_pll.c */
 bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
 int intel_compute_dsi_pll(struct intel_encoder *encoder,
 			  struct intel_crtc_state *config);
-- 
2.11.0

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[PATCH v2 2/2] drm/i915/dsi: use gen7 prefix for the global DSI functions

[Jani Nikula]

Avoid confusion with the functions to be added for the new gen 11 DSI
implementation by renaming the current DSI functions. While at it,
permutate the words in the function names to make them all start with
"gen7_dsi" or "gen7_dsi_pll".

Leave the static functions as-is for now; they could be renamed later if
needed.

No functional changes.

References: https://patchwork.freedesktop.org/series/44823/
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/gen7_dsi.c      | 21 ++++++++++-----------
 drivers/gpu/drm/i915/gen7_dsi_pll.c  | 18 +++++++++---------
 drivers/gpu/drm/i915/intel_display.c |  6 +++---
 drivers/gpu/drm/i915/intel_drv.h     |  2 +-
 drivers/gpu/drm/i915/intel_dsi.h     | 21 ++++++++++-----------
 drivers/gpu/drm/i915/intel_dsi_vbt.c |  2 +-
 6 files changed, 34 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/i915/gen7_dsi.c b/drivers/gpu/drm/i915/gen7_dsi.c
index 3b7acb5a70b3..6dd5e9988221 100644
--- a/drivers/gpu/drm/i915/gen7_dsi.c
+++ b/drivers/gpu/drm/i915/gen7_dsi.c
@@ -69,7 +69,7 @@ enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt)
 	}
 }
 
-void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port)
+void gen7_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port)
 {
 	struct drm_encoder *encoder = &intel_dsi->base.base;
 	struct drm_device *dev = encoder->dev;
@@ -344,7 +344,7 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder,
 			pipe_config->cpu_transcoder = TRANSCODER_DSI_A;
 	}
 
-	ret = intel_compute_dsi_pll(encoder, pipe_config);
+	ret = gen7_dsi_pll_compute(encoder, pipe_config);
 	if (ret)
 		return false;
 
@@ -810,8 +810,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
 	 * The BIOS may leave the PLL in a wonky state where it doesn't
 	 * lock. It needs to be fully powered down to fix it.
 	 */
-	intel_disable_dsi_pll(encoder);
-	intel_enable_dsi_pll(encoder, pipe_config);
+	gen7_dsi_pll_disable(encoder);
+	gen7_dsi_pll_enable(encoder, pipe_config);
 
 	if (IS_BROXTON(dev_priv)) {
 		/* Add MIPI IO reset programming for modeset */
@@ -949,7 +949,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder,
 
 	if (is_vid_mode(intel_dsi)) {
 		for_each_dsi_port(port, intel_dsi->ports)
-			wait_for_dsi_fifo_empty(intel_dsi, port);
+			gen7_dsi_wait_for_fifo_empty(intel_dsi, port);
 
 		intel_dsi_port_disable(encoder);
 		usleep_range(2000, 5000);
@@ -979,7 +979,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder,
 				val & ~MIPIO_RST_CTRL);
 	}
 
-	intel_disable_dsi_pll(encoder);
+	gen7_dsi_pll_disable(encoder);
 
 	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
 		u32 val;
@@ -1024,7 +1024,7 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
 	 * configuration, otherwise accessing DSI registers will hang the
 	 * machine. See BSpec North Display Engine registers/MIPI[BXT].
 	 */
-	if (IS_GEN9_LP(dev_priv) && !intel_dsi_pll_is_enabled(dev_priv))
+	if (IS_GEN9_LP(dev_priv) && !gen7_dsi_pll_is_enabled(dev_priv))
 		goto out_put_power;
 
 	/* XXX: this only works for one DSI output */
@@ -1250,8 +1250,7 @@ static void intel_dsi_get_config(struct intel_encoder *encoder,
 	if (IS_GEN9_LP(dev_priv))
 		bxt_dsi_get_pipe_config(encoder, pipe_config);
 
-	pclk = intel_dsi_get_pclk(encoder, pipe_config->pipe_bpp,
-				  pipe_config);
+	pclk = gen7_dsi_get_pclk(encoder, pipe_config->pipe_bpp, pipe_config);
 	if (!pclk)
 		return;
 
@@ -1590,7 +1589,7 @@ static void intel_dsi_unprepare(struct intel_encoder *encoder)
 			/* Panel commands can be sent when clock is in LP11 */
 			I915_WRITE(MIPI_DEVICE_READY(port), 0x0);
 
-			intel_dsi_reset_clocks(encoder, port);
+			gen7_dsi_reset_clocks(encoder, port);
 			I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);
 
 			val = I915_READ(MIPI_DSI_FUNC_PRG(port));
@@ -1713,7 +1712,7 @@ static void intel_dsi_add_properties(struct intel_connector *connector)
 	}
 }
 
-void intel_dsi_init(struct drm_i915_private *dev_priv)
+void gen7_dsi_init(struct drm_i915_private *dev_priv)
 {
 	struct drm_device *dev = &dev_priv->drm;
 	struct intel_dsi *intel_dsi;
diff --git a/drivers/gpu/drm/i915/gen7_dsi_pll.c b/drivers/gpu/drm/i915/gen7_dsi_pll.c
index 2ff2ee7f3b78..bb46996a5843 100644
--- a/drivers/gpu/drm/i915/gen7_dsi_pll.c
+++ b/drivers/gpu/drm/i915/gen7_dsi_pll.c
@@ -357,8 +357,8 @@ static u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
 	return pclk;
 }
 
-u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
-		       struct intel_crtc_state *config)
+u32 gen7_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
+		      struct intel_crtc_state *config)
 {
 	if (IS_GEN9_LP(to_i915(encoder->base.dev)))
 		return bxt_dsi_get_pclk(encoder, pipe_bpp, config);
@@ -568,7 +568,7 @@ static void gen9lp_enable_dsi_pll(struct intel_encoder *encoder,
 	DRM_DEBUG_KMS("DSI PLL locked\n");
 }
 
-bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
+bool gen7_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
 {
 	if (IS_GEN9_LP(dev_priv))
 		return bxt_dsi_pll_is_enabled(dev_priv);
@@ -578,8 +578,8 @@ bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
 	return false;
 }
 
-int intel_compute_dsi_pll(struct intel_encoder *encoder,
-			  struct intel_crtc_state *config)
+int gen7_dsi_pll_compute(struct intel_encoder *encoder,
+			 struct intel_crtc_state *config)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
@@ -591,8 +591,8 @@ int intel_compute_dsi_pll(struct intel_encoder *encoder,
 	return -ENODEV;
 }
 
-void intel_enable_dsi_pll(struct intel_encoder *encoder,
-			  const struct intel_crtc_state *config)
+void gen7_dsi_pll_enable(struct intel_encoder *encoder,
+			 const struct intel_crtc_state *config)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
@@ -602,7 +602,7 @@ void intel_enable_dsi_pll(struct intel_encoder *encoder,
 		gen9lp_enable_dsi_pll(encoder, config);
 }
 
-void intel_disable_dsi_pll(struct intel_encoder *encoder)
+void gen7_dsi_pll_disable(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
@@ -639,7 +639,7 @@ static void gen9lp_dsi_reset_clocks(struct intel_encoder *encoder,
 	I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);
 }
 
-void intel_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)
+void gen7_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 681e0710a467..e94a2d65b4a4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9414,7 +9414,7 @@ static bool bxt_get_dsi_transcoder_state(struct intel_crtc *crtc,
 		 * registers/MIPI[BXT]. We can break out here early, since we
 		 * need the same DSI PLL to be enabled for both DSI ports.
 		 */
-		if (!intel_dsi_pll_is_enabled(dev_priv))
+		if (!gen7_dsi_pll_is_enabled(dev_priv))
 			break;
 
 		/* XXX: this works for video mode only */
@@ -14133,7 +14133,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
 		intel_ddi_init(dev_priv, PORT_B);
 		intel_ddi_init(dev_priv, PORT_C);
 
-		intel_dsi_init(dev_priv);
+		gen7_dsi_init(dev_priv);
 	} else if (HAS_DDI(dev_priv)) {
 		int found;
 
@@ -14239,7 +14239,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
 				intel_hdmi_init(dev_priv, CHV_HDMID, PORT_D);
 		}
 
-		intel_dsi_init(dev_priv);
+		gen7_dsi_init(dev_priv);
 	} else if (!IS_GEN2(dev_priv) && !IS_PINEVIEW(dev_priv)) {
 		bool found = false;
 
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 888a85dc3856..7fd0bb25bf84 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1731,7 +1731,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector);
 int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id);
 void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
 /* gen7_dsi.c */
-void intel_dsi_init(struct drm_i915_private *dev_priv);
+void gen7_dsi_init(struct drm_i915_private *dev_priv);
 
 /* intel_dsi_dcs_backlight.c */
 int intel_dsi_dcs_init_backlight_funcs(struct intel_connector *intel_connector);
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index 1b5c2c167472..b87f2531aeea 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -130,20 +130,19 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
 }
 
 /* gen7_dsi.c */
-void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
+void gen7_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
 enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
 
 /* gen7_dsi_pll.c */
-bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
-int intel_compute_dsi_pll(struct intel_encoder *encoder,
-			  struct intel_crtc_state *config);
-void intel_enable_dsi_pll(struct intel_encoder *encoder,
-			  const struct intel_crtc_state *config);
-void intel_disable_dsi_pll(struct intel_encoder *encoder);
-u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
-		       struct intel_crtc_state *config);
-void intel_dsi_reset_clocks(struct intel_encoder *encoder,
-			    enum port port);
+bool gen7_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
+int gen7_dsi_pll_compute(struct intel_encoder *encoder,
+			 struct intel_crtc_state *config);
+void gen7_dsi_pll_enable(struct intel_encoder *encoder,
+			 const struct intel_crtc_state *config);
+void gen7_dsi_pll_disable(struct intel_encoder *encoder);
+u32 gen7_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
+		      struct intel_crtc_state *config);
+void gen7_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
 
 /* intel_dsi_vbt.c */
 bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c b/drivers/gpu/drm/i915/intel_dsi_vbt.c
index 4d6ffa7b3e7b..0f4bf9541e84 100644
--- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
@@ -181,7 +181,7 @@ static const u8 *mipi_exec_send_packet(struct intel_dsi *intel_dsi,
 		break;
 	}
 
-	wait_for_dsi_fifo_empty(intel_dsi, port);
+	gen7_dsi_wait_for_fifo_empty(intel_dsi, port);
 
 out:
 	data += len;
-- 
2.11.0

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Re: [PATCH v2 2/2] drm/i915/dsi: use gen7 prefix for the global DSI functions

[Chauhan, Madhav]

> -----Original Message-----
> From: Nikula, Jani
> Sent: Tuesday, July 3, 2018 7:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; Chauhan, Madhav
> <madhav.chauhan@intel.com>; Daniel Vetter <daniel@ffwll.ch>; Chris
> Wilson <chris@chris-wilson.co.uk>
> Subject: [PATCH v2 2/2] drm/i915/dsi: use gen7 prefix for the global DSI
> functions
> 
> Avoid confusion with the functions to be added for the new gen 11 DSI
> implementation by renaming the current DSI functions. While at it,
> permutate the words in the function names to make them all start with
> "gen7_dsi" or "gen7_dsi_pll".
> 
> Leave the static functions as-is for now; they could be renamed later if
> needed.
> 
> No functional changes.
> 
> References: https://patchwork.freedesktop.org/series/44823/
> Cc: Madhav Chauhan <madhav.chauhan@intel.com>
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/gen7_dsi.c      | 21 ++++++++++-----------
>  drivers/gpu/drm/i915/gen7_dsi_pll.c  | 18 +++++++++---------
> drivers/gpu/drm/i915/intel_display.c |  6 +++---
>  drivers/gpu/drm/i915/intel_drv.h     |  2 +-
>  drivers/gpu/drm/i915/intel_dsi.h     | 21 ++++++++++-----------
>  drivers/gpu/drm/i915/intel_dsi_vbt.c |  2 +-
>  6 files changed, 34 insertions(+), 36 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gen7_dsi.c
> b/drivers/gpu/drm/i915/gen7_dsi.c index 3b7acb5a70b3..6dd5e9988221
> 100644
> --- a/drivers/gpu/drm/i915/gen7_dsi.c
> +++ b/drivers/gpu/drm/i915/gen7_dsi.c
> @@ -69,7 +69,7 @@ enum mipi_dsi_pixel_format
> pixel_format_from_register_bits(u32 fmt)

What about this function i.e. enum mipi_dsi_pixel_format pixel_format_from_register_bits()??
This will be used by gen11_dsi.c and currently getting used inside intel_dsi_vbt.c.

Regards,
Madhav

>  	}
>  }
> 
> -void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port)
> +void gen7_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum
> +port port)
>  {
>  	struct drm_encoder *encoder = &intel_dsi->base.base;
>  	struct drm_device *dev = encoder->dev; @@ -344,7 +344,7 @@
> static bool intel_dsi_compute_config(struct intel_encoder *encoder,
>  			pipe_config->cpu_transcoder = TRANSCODER_DSI_A;
>  	}
> 
> -	ret = intel_compute_dsi_pll(encoder, pipe_config);
> +	ret = gen7_dsi_pll_compute(encoder, pipe_config);
>  	if (ret)
>  		return false;
> 
> @@ -810,8 +810,8 @@ static void intel_dsi_pre_enable(struct intel_encoder
> *encoder,
>  	 * The BIOS may leave the PLL in a wonky state where it doesn't
>  	 * lock. It needs to be fully powered down to fix it.
>  	 */
> -	intel_disable_dsi_pll(encoder);
> -	intel_enable_dsi_pll(encoder, pipe_config);
> +	gen7_dsi_pll_disable(encoder);
> +	gen7_dsi_pll_enable(encoder, pipe_config);
> 
>  	if (IS_BROXTON(dev_priv)) {
>  		/* Add MIPI IO reset programming for modeset */ @@ -
> 949,7 +949,7 @@ static void intel_dsi_post_disable(struct intel_encoder
> *encoder,
> 
>  	if (is_vid_mode(intel_dsi)) {
>  		for_each_dsi_port(port, intel_dsi->ports)
> -			wait_for_dsi_fifo_empty(intel_dsi, port);
> +			gen7_dsi_wait_for_fifo_empty(intel_dsi, port);
> 
>  		intel_dsi_port_disable(encoder);
>  		usleep_range(2000, 5000);
> @@ -979,7 +979,7 @@ static void intel_dsi_post_disable(struct
> intel_encoder *encoder,
>  				val & ~MIPIO_RST_CTRL);
>  	}
> 
> -	intel_disable_dsi_pll(encoder);
> +	gen7_dsi_pll_disable(encoder);
> 
>  	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
>  		u32 val;
> @@ -1024,7 +1024,7 @@ static bool intel_dsi_get_hw_state(struct
> intel_encoder *encoder,
>  	 * configuration, otherwise accessing DSI registers will hang the
>  	 * machine. See BSpec North Display Engine registers/MIPI[BXT].
>  	 */
> -	if (IS_GEN9_LP(dev_priv) && !intel_dsi_pll_is_enabled(dev_priv))
> +	if (IS_GEN9_LP(dev_priv) && !gen7_dsi_pll_is_enabled(dev_priv))
>  		goto out_put_power;
> 
>  	/* XXX: this only works for one DSI output */ @@ -1250,8 +1250,7
> @@ static void intel_dsi_get_config(struct intel_encoder *encoder,
>  	if (IS_GEN9_LP(dev_priv))
>  		bxt_dsi_get_pipe_config(encoder, pipe_config);
> 
> -	pclk = intel_dsi_get_pclk(encoder, pipe_config->pipe_bpp,
> -				  pipe_config);
> +	pclk = gen7_dsi_get_pclk(encoder, pipe_config->pipe_bpp,
> pipe_config);
>  	if (!pclk)
>  		return;
> 
> @@ -1590,7 +1589,7 @@ static void intel_dsi_unprepare(struct
> intel_encoder *encoder)
>  			/* Panel commands can be sent when clock is in LP11
> */
>  			I915_WRITE(MIPI_DEVICE_READY(port), 0x0);
> 
> -			intel_dsi_reset_clocks(encoder, port);
> +			gen7_dsi_reset_clocks(encoder, port);
>  			I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);
> 
>  			val = I915_READ(MIPI_DSI_FUNC_PRG(port));
> @@ -1713,7 +1712,7 @@ static void intel_dsi_add_properties(struct
> intel_connector *connector)
>  	}
>  }
> 
> -void intel_dsi_init(struct drm_i915_private *dev_priv)
> +void gen7_dsi_init(struct drm_i915_private *dev_priv)
>  {
>  	struct drm_device *dev = &dev_priv->drm;
>  	struct intel_dsi *intel_dsi;
> diff --git a/drivers/gpu/drm/i915/gen7_dsi_pll.c
> b/drivers/gpu/drm/i915/gen7_dsi_pll.c
> index 2ff2ee7f3b78..bb46996a5843 100644
> --- a/drivers/gpu/drm/i915/gen7_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/gen7_dsi_pll.c
> @@ -357,8 +357,8 @@ static u32 bxt_dsi_get_pclk(struct intel_encoder
> *encoder, int pipe_bpp,
>  	return pclk;
>  }
> 
> -u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
> -		       struct intel_crtc_state *config)
> +u32 gen7_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
> +		      struct intel_crtc_state *config)
>  {
>  	if (IS_GEN9_LP(to_i915(encoder->base.dev)))
>  		return bxt_dsi_get_pclk(encoder, pipe_bpp, config); @@ -
> 568,7 +568,7 @@ static void gen9lp_enable_dsi_pll(struct intel_encoder
> *encoder,
>  	DRM_DEBUG_KMS("DSI PLL locked\n");
>  }
> 
> -bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
> +bool gen7_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
>  {
>  	if (IS_GEN9_LP(dev_priv))
>  		return bxt_dsi_pll_is_enabled(dev_priv); @@ -578,8 +578,8
> @@ bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
>  	return false;
>  }
> 
> -int intel_compute_dsi_pll(struct intel_encoder *encoder,
> -			  struct intel_crtc_state *config)
> +int gen7_dsi_pll_compute(struct intel_encoder *encoder,
> +			 struct intel_crtc_state *config)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> 
> @@ -591,8 +591,8 @@ int intel_compute_dsi_pll(struct intel_encoder
> *encoder,
>  	return -ENODEV;
>  }
> 
> -void intel_enable_dsi_pll(struct intel_encoder *encoder,
> -			  const struct intel_crtc_state *config)
> +void gen7_dsi_pll_enable(struct intel_encoder *encoder,
> +			 const struct intel_crtc_state *config)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> 
> @@ -602,7 +602,7 @@ void intel_enable_dsi_pll(struct intel_encoder
> *encoder,
>  		gen9lp_enable_dsi_pll(encoder, config);  }
> 
> -void intel_disable_dsi_pll(struct intel_encoder *encoder)
> +void gen7_dsi_pll_disable(struct intel_encoder *encoder)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> 
> @@ -639,7 +639,7 @@ static void gen9lp_dsi_reset_clocks(struct
> intel_encoder *encoder,
>  	I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);  }
> 
> -void intel_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)
> +void gen7_dsi_reset_clocks(struct intel_encoder *encoder, enum port
> +port)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 681e0710a467..e94a2d65b4a4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9414,7 +9414,7 @@ static bool bxt_get_dsi_transcoder_state(struct
> intel_crtc *crtc,
>  		 * registers/MIPI[BXT]. We can break out here early, since we
>  		 * need the same DSI PLL to be enabled for both DSI ports.
>  		 */
> -		if (!intel_dsi_pll_is_enabled(dev_priv))
> +		if (!gen7_dsi_pll_is_enabled(dev_priv))
>  			break;
> 
>  		/* XXX: this works for video mode only */ @@ -14133,7
> +14133,7 @@ static void intel_setup_outputs(struct drm_i915_private
> *dev_priv)
>  		intel_ddi_init(dev_priv, PORT_B);
>  		intel_ddi_init(dev_priv, PORT_C);
> 
> -		intel_dsi_init(dev_priv);
> +		gen7_dsi_init(dev_priv);
>  	} else if (HAS_DDI(dev_priv)) {
>  		int found;
> 
> @@ -14239,7 +14239,7 @@ static void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
>  				intel_hdmi_init(dev_priv, CHV_HDMID,
> PORT_D);
>  		}
> 
> -		intel_dsi_init(dev_priv);
> +		gen7_dsi_init(dev_priv);
>  	} else if (!IS_GEN2(dev_priv) && !IS_PINEVIEW(dev_priv)) {
>  		bool found = false;
> 
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 888a85dc3856..7fd0bb25bf84 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1731,7 +1731,7 @@ int intel_dp_aux_init_backlight_funcs(struct
> intel_connector *intel_connector);  int intel_dp_mst_encoder_init(struct
> intel_digital_port *intel_dig_port, int conn_id);  void
> intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
>  /* gen7_dsi.c */
> -void intel_dsi_init(struct drm_i915_private *dev_priv);
> +void gen7_dsi_init(struct drm_i915_private *dev_priv);
> 
>  /* intel_dsi_dcs_backlight.c */
>  int intel_dsi_dcs_init_backlight_funcs(struct intel_connector
> *intel_connector); diff --git a/drivers/gpu/drm/i915/intel_dsi.h
> b/drivers/gpu/drm/i915/intel_dsi.h
> index 1b5c2c167472..b87f2531aeea 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -130,20 +130,19 @@ static inline struct intel_dsi
> *enc_to_intel_dsi(struct drm_encoder *encoder)  }
> 
>  /* gen7_dsi.c */
> -void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
> +void gen7_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum
> +port port);
>  enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
> 
>  /* gen7_dsi_pll.c */
> -bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); -int
> intel_compute_dsi_pll(struct intel_encoder *encoder,
> -			  struct intel_crtc_state *config);
> -void intel_enable_dsi_pll(struct intel_encoder *encoder,
> -			  const struct intel_crtc_state *config);
> -void intel_disable_dsi_pll(struct intel_encoder *encoder);
> -u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
> -		       struct intel_crtc_state *config);
> -void intel_dsi_reset_clocks(struct intel_encoder *encoder,
> -			    enum port port);
> +bool gen7_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); int
> +gen7_dsi_pll_compute(struct intel_encoder *encoder,
> +			 struct intel_crtc_state *config);
> +void gen7_dsi_pll_enable(struct intel_encoder *encoder,
> +			 const struct intel_crtc_state *config); void
> +gen7_dsi_pll_disable(struct intel_encoder *encoder);
> +u32 gen7_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
> +		      struct intel_crtc_state *config); void
> +gen7_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
> 
>  /* intel_dsi_vbt.c */
>  bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id); diff --git
> a/drivers/gpu/drm/i915/intel_dsi_vbt.c
> b/drivers/gpu/drm/i915/intel_dsi_vbt.c
> index 4d6ffa7b3e7b..0f4bf9541e84 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
> @@ -181,7 +181,7 @@ static const u8 *mipi_exec_send_packet(struct
> intel_dsi *intel_dsi,
>  		break;
>  	}
> 
> -	wait_for_dsi_fifo_empty(intel_dsi, port);
> +	gen7_dsi_wait_for_fifo_empty(intel_dsi, port);
> 
>  out:
>  	data += len;
> --
> 2.11.0

_______________________________________________
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Intel-gfx@lists.freedesktop.org
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Re: [PATCH v2 2/2] drm/i915/dsi: use gen7 prefix for the global DSI functions

[Jani Nikula]

On Thu, 05 Jul 2018, "Chauhan, Madhav" <madhav.chauhan@intel.com> wrote:
>> -----Original Message-----
>> From: Nikula, Jani
>> Sent: Tuesday, July 3, 2018 7:23 PM
>> To: intel-gfx@lists.freedesktop.org
>> Cc: Nikula, Jani <jani.nikula@intel.com>; Chauhan, Madhav
>> <madhav.chauhan@intel.com>; Daniel Vetter <daniel@ffwll.ch>; Chris
>> Wilson <chris@chris-wilson.co.uk>
>> Subject: [PATCH v2 2/2] drm/i915/dsi: use gen7 prefix for the global DSI
>> functions
>> 
>> Avoid confusion with the functions to be added for the new gen 11 DSI
>> implementation by renaming the current DSI functions. While at it,
>> permutate the words in the function names to make them all start with
>> "gen7_dsi" or "gen7_dsi_pll".
>> 
>> Leave the static functions as-is for now; they could be renamed later if
>> needed.
>> 
>> No functional changes.
>> 
>> References: https://patchwork.freedesktop.org/series/44823/
>> Cc: Madhav Chauhan <madhav.chauhan@intel.com>
>> Cc: Daniel Vetter <daniel@ffwll.ch>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/gen7_dsi.c      | 21 ++++++++++-----------
>>  drivers/gpu/drm/i915/gen7_dsi_pll.c  | 18 +++++++++---------
>> drivers/gpu/drm/i915/intel_display.c |  6 +++---
>>  drivers/gpu/drm/i915/intel_drv.h     |  2 +-
>>  drivers/gpu/drm/i915/intel_dsi.h     | 21 ++++++++++-----------
>>  drivers/gpu/drm/i915/intel_dsi_vbt.c |  2 +-
>>  6 files changed, 34 insertions(+), 36 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/gen7_dsi.c
>> b/drivers/gpu/drm/i915/gen7_dsi.c index 3b7acb5a70b3..6dd5e9988221
>> 100644
>> --- a/drivers/gpu/drm/i915/gen7_dsi.c
>> +++ b/drivers/gpu/drm/i915/gen7_dsi.c
>> @@ -69,7 +69,7 @@ enum mipi_dsi_pixel_format
>> pixel_format_from_register_bits(u32 fmt)
>
> What about this function i.e. enum mipi_dsi_pixel_format pixel_format_from_register_bits()??
> This will be used by gen11_dsi.c and currently getting used inside intel_dsi_vbt.c.

Let it be for now. If we ever reach an agreement over what the filenames
should be (argh!) we can afterwards repurpose intel_dsi.c for any common
stuff.

BR,
Jani.

>
> Regards,
> Madhav
>
>>  	}
>>  }
>> 
>> -void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port)
>> +void gen7_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum
>> +port port)
>>  {
>>  	struct drm_encoder *encoder = &intel_dsi->base.base;
>>  	struct drm_device *dev = encoder->dev; @@ -344,7 +344,7 @@
>> static bool intel_dsi_compute_config(struct intel_encoder *encoder,
>>  			pipe_config->cpu_transcoder = TRANSCODER_DSI_A;
>>  	}
>> 
>> -	ret = intel_compute_dsi_pll(encoder, pipe_config);
>> +	ret = gen7_dsi_pll_compute(encoder, pipe_config);
>>  	if (ret)
>>  		return false;
>> 
>> @@ -810,8 +810,8 @@ static void intel_dsi_pre_enable(struct intel_encoder
>> *encoder,
>>  	 * The BIOS may leave the PLL in a wonky state where it doesn't
>>  	 * lock. It needs to be fully powered down to fix it.
>>  	 */
>> -	intel_disable_dsi_pll(encoder);
>> -	intel_enable_dsi_pll(encoder, pipe_config);
>> +	gen7_dsi_pll_disable(encoder);
>> +	gen7_dsi_pll_enable(encoder, pipe_config);
>> 
>>  	if (IS_BROXTON(dev_priv)) {
>>  		/* Add MIPI IO reset programming for modeset */ @@ -
>> 949,7 +949,7 @@ static void intel_dsi_post_disable(struct intel_encoder
>> *encoder,
>> 
>>  	if (is_vid_mode(intel_dsi)) {
>>  		for_each_dsi_port(port, intel_dsi->ports)
>> -			wait_for_dsi_fifo_empty(intel_dsi, port);
>> +			gen7_dsi_wait_for_fifo_empty(intel_dsi, port);
>> 
>>  		intel_dsi_port_disable(encoder);
>>  		usleep_range(2000, 5000);
>> @@ -979,7 +979,7 @@ static void intel_dsi_post_disable(struct
>> intel_encoder *encoder,
>>  				val & ~MIPIO_RST_CTRL);
>>  	}
>> 
>> -	intel_disable_dsi_pll(encoder);
>> +	gen7_dsi_pll_disable(encoder);
>> 
>>  	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
>>  		u32 val;
>> @@ -1024,7 +1024,7 @@ static bool intel_dsi_get_hw_state(struct
>> intel_encoder *encoder,
>>  	 * configuration, otherwise accessing DSI registers will hang the
>>  	 * machine. See BSpec North Display Engine registers/MIPI[BXT].
>>  	 */
>> -	if (IS_GEN9_LP(dev_priv) && !intel_dsi_pll_is_enabled(dev_priv))
>> +	if (IS_GEN9_LP(dev_priv) && !gen7_dsi_pll_is_enabled(dev_priv))
>>  		goto out_put_power;
>> 
>>  	/* XXX: this only works for one DSI output */ @@ -1250,8 +1250,7
>> @@ static void intel_dsi_get_config(struct intel_encoder *encoder,
>>  	if (IS_GEN9_LP(dev_priv))
>>  		bxt_dsi_get_pipe_config(encoder, pipe_config);
>> 
>> -	pclk = intel_dsi_get_pclk(encoder, pipe_config->pipe_bpp,
>> -				  pipe_config);
>> +	pclk = gen7_dsi_get_pclk(encoder, pipe_config->pipe_bpp,
>> pipe_config);
>>  	if (!pclk)
>>  		return;
>> 
>> @@ -1590,7 +1589,7 @@ static void intel_dsi_unprepare(struct
>> intel_encoder *encoder)
>>  			/* Panel commands can be sent when clock is in LP11
>> */
>>  			I915_WRITE(MIPI_DEVICE_READY(port), 0x0);
>> 
>> -			intel_dsi_reset_clocks(encoder, port);
>> +			gen7_dsi_reset_clocks(encoder, port);
>>  			I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);
>> 
>>  			val = I915_READ(MIPI_DSI_FUNC_PRG(port));
>> @@ -1713,7 +1712,7 @@ static void intel_dsi_add_properties(struct
>> intel_connector *connector)
>>  	}
>>  }
>> 
>> -void intel_dsi_init(struct drm_i915_private *dev_priv)
>> +void gen7_dsi_init(struct drm_i915_private *dev_priv)
>>  {
>>  	struct drm_device *dev = &dev_priv->drm;
>>  	struct intel_dsi *intel_dsi;
>> diff --git a/drivers/gpu/drm/i915/gen7_dsi_pll.c
>> b/drivers/gpu/drm/i915/gen7_dsi_pll.c
>> index 2ff2ee7f3b78..bb46996a5843 100644
>> --- a/drivers/gpu/drm/i915/gen7_dsi_pll.c
>> +++ b/drivers/gpu/drm/i915/gen7_dsi_pll.c
>> @@ -357,8 +357,8 @@ static u32 bxt_dsi_get_pclk(struct intel_encoder
>> *encoder, int pipe_bpp,
>>  	return pclk;
>>  }
>> 
>> -u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
>> -		       struct intel_crtc_state *config)
>> +u32 gen7_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
>> +		      struct intel_crtc_state *config)
>>  {
>>  	if (IS_GEN9_LP(to_i915(encoder->base.dev)))
>>  		return bxt_dsi_get_pclk(encoder, pipe_bpp, config); @@ -
>> 568,7 +568,7 @@ static void gen9lp_enable_dsi_pll(struct intel_encoder
>> *encoder,
>>  	DRM_DEBUG_KMS("DSI PLL locked\n");
>>  }
>> 
>> -bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
>> +bool gen7_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
>>  {
>>  	if (IS_GEN9_LP(dev_priv))
>>  		return bxt_dsi_pll_is_enabled(dev_priv); @@ -578,8 +578,8
>> @@ bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
>>  	return false;
>>  }
>> 
>> -int intel_compute_dsi_pll(struct intel_encoder *encoder,
>> -			  struct intel_crtc_state *config)
>> +int gen7_dsi_pll_compute(struct intel_encoder *encoder,
>> +			 struct intel_crtc_state *config)
>>  {
>>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> 
>> @@ -591,8 +591,8 @@ int intel_compute_dsi_pll(struct intel_encoder
>> *encoder,
>>  	return -ENODEV;
>>  }
>> 
>> -void intel_enable_dsi_pll(struct intel_encoder *encoder,
>> -			  const struct intel_crtc_state *config)
>> +void gen7_dsi_pll_enable(struct intel_encoder *encoder,
>> +			 const struct intel_crtc_state *config)
>>  {
>>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> 
>> @@ -602,7 +602,7 @@ void intel_enable_dsi_pll(struct intel_encoder
>> *encoder,
>>  		gen9lp_enable_dsi_pll(encoder, config);  }
>> 
>> -void intel_disable_dsi_pll(struct intel_encoder *encoder)
>> +void gen7_dsi_pll_disable(struct intel_encoder *encoder)
>>  {
>>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> 
>> @@ -639,7 +639,7 @@ static void gen9lp_dsi_reset_clocks(struct
>> intel_encoder *encoder,
>>  	I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);  }
>> 
>> -void intel_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)
>> +void gen7_dsi_reset_clocks(struct intel_encoder *encoder, enum port
>> +port)
>>  {
>>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_display.c
>> b/drivers/gpu/drm/i915/intel_display.c
>> index 681e0710a467..e94a2d65b4a4 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -9414,7 +9414,7 @@ static bool bxt_get_dsi_transcoder_state(struct
>> intel_crtc *crtc,
>>  		 * registers/MIPI[BXT]. We can break out here early, since we
>>  		 * need the same DSI PLL to be enabled for both DSI ports.
>>  		 */
>> -		if (!intel_dsi_pll_is_enabled(dev_priv))
>> +		if (!gen7_dsi_pll_is_enabled(dev_priv))
>>  			break;
>> 
>>  		/* XXX: this works for video mode only */ @@ -14133,7
>> +14133,7 @@ static void intel_setup_outputs(struct drm_i915_private
>> *dev_priv)
>>  		intel_ddi_init(dev_priv, PORT_B);
>>  		intel_ddi_init(dev_priv, PORT_C);
>> 
>> -		intel_dsi_init(dev_priv);
>> +		gen7_dsi_init(dev_priv);
>>  	} else if (HAS_DDI(dev_priv)) {
>>  		int found;
>> 
>> @@ -14239,7 +14239,7 @@ static void intel_setup_outputs(struct
>> drm_i915_private *dev_priv)
>>  				intel_hdmi_init(dev_priv, CHV_HDMID,
>> PORT_D);
>>  		}
>> 
>> -		intel_dsi_init(dev_priv);
>> +		gen7_dsi_init(dev_priv);
>>  	} else if (!IS_GEN2(dev_priv) && !IS_PINEVIEW(dev_priv)) {
>>  		bool found = false;
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_drv.h
>> b/drivers/gpu/drm/i915/intel_drv.h
>> index 888a85dc3856..7fd0bb25bf84 100644
>> --- a/drivers/gpu/drm/i915/intel_drv.h
>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>> @@ -1731,7 +1731,7 @@ int intel_dp_aux_init_backlight_funcs(struct
>> intel_connector *intel_connector);  int intel_dp_mst_encoder_init(struct
>> intel_digital_port *intel_dig_port, int conn_id);  void
>> intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
>>  /* gen7_dsi.c */
>> -void intel_dsi_init(struct drm_i915_private *dev_priv);
>> +void gen7_dsi_init(struct drm_i915_private *dev_priv);
>> 
>>  /* intel_dsi_dcs_backlight.c */
>>  int intel_dsi_dcs_init_backlight_funcs(struct intel_connector
>> *intel_connector); diff --git a/drivers/gpu/drm/i915/intel_dsi.h
>> b/drivers/gpu/drm/i915/intel_dsi.h
>> index 1b5c2c167472..b87f2531aeea 100644
>> --- a/drivers/gpu/drm/i915/intel_dsi.h
>> +++ b/drivers/gpu/drm/i915/intel_dsi.h
>> @@ -130,20 +130,19 @@ static inline struct intel_dsi
>> *enc_to_intel_dsi(struct drm_encoder *encoder)  }
>> 
>>  /* gen7_dsi.c */
>> -void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
>> +void gen7_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum
>> +port port);
>>  enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
>> 
>>  /* gen7_dsi_pll.c */
>> -bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); -int
>> intel_compute_dsi_pll(struct intel_encoder *encoder,
>> -			  struct intel_crtc_state *config);
>> -void intel_enable_dsi_pll(struct intel_encoder *encoder,
>> -			  const struct intel_crtc_state *config);
>> -void intel_disable_dsi_pll(struct intel_encoder *encoder);
>> -u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
>> -		       struct intel_crtc_state *config);
>> -void intel_dsi_reset_clocks(struct intel_encoder *encoder,
>> -			    enum port port);
>> +bool gen7_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); int
>> +gen7_dsi_pll_compute(struct intel_encoder *encoder,
>> +			 struct intel_crtc_state *config);
>> +void gen7_dsi_pll_enable(struct intel_encoder *encoder,
>> +			 const struct intel_crtc_state *config); void
>> +gen7_dsi_pll_disable(struct intel_encoder *encoder);
>> +u32 gen7_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
>> +		      struct intel_crtc_state *config); void
>> +gen7_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
>> 
>>  /* intel_dsi_vbt.c */
>>  bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id); diff --git
>> a/drivers/gpu/drm/i915/intel_dsi_vbt.c
>> b/drivers/gpu/drm/i915/intel_dsi_vbt.c
>> index 4d6ffa7b3e7b..0f4bf9541e84 100644
>> --- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
>> +++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
>> @@ -181,7 +181,7 @@ static const u8 *mipi_exec_send_packet(struct
>> intel_dsi *intel_dsi,
>>  		break;
>>  	}
>> 
>> -	wait_for_dsi_fifo_empty(intel_dsi, port);
>> +	gen7_dsi_wait_for_fifo_empty(intel_dsi, port);
>> 
>>  out:
>>  	data += len;
>> --
>> 2.11.0
>

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2 2/2] drm/i915/dsi: use gen7 prefix for the global DSI functions

[Chauhan, Madhav]

> -----Original Message-----
> From: Nikula, Jani
> Sent: Thursday, July 5, 2018 3:31 PM
> To: Chauhan, Madhav <madhav.chauhan@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: Daniel Vetter <daniel@ffwll.ch>; Chris Wilson <chris@chris-wilson.co.uk>
> Subject: RE: [PATCH v2 2/2] drm/i915/dsi: use gen7 prefix for the global DSI
> functions
> 
> On Thu, 05 Jul 2018, "Chauhan, Madhav" <madhav.chauhan@intel.com>
> wrote:
> >> -----Original Message-----
> >> From: Nikula, Jani
> >> Sent: Tuesday, July 3, 2018 7:23 PM
> >> To: intel-gfx@lists.freedesktop.org
> >> Cc: Nikula, Jani <jani.nikula@intel.com>; Chauhan, Madhav
> >> <madhav.chauhan@intel.com>; Daniel Vetter <daniel@ffwll.ch>; Chris
> >> Wilson <chris@chris-wilson.co.uk>
> >> Subject: [PATCH v2 2/2] drm/i915/dsi: use gen7 prefix for the global
> >> DSI functions
> >>
> >> Avoid confusion with the functions to be added for the new gen 11 DSI
> >> implementation by renaming the current DSI functions. While at it,
> >> permutate the words in the function names to make them all start with
> >> "gen7_dsi" or "gen7_dsi_pll".
> >>
> >> Leave the static functions as-is for now; they could be renamed later
> >> if needed.
> >>
> >> No functional changes.
> >>
> >> References: https://patchwork.freedesktop.org/series/44823/
> >> Cc: Madhav Chauhan <madhav.chauhan@intel.com>
> >> Cc: Daniel Vetter <daniel@ffwll.ch>
> >> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/gen7_dsi.c      | 21 ++++++++++-----------
> >>  drivers/gpu/drm/i915/gen7_dsi_pll.c  | 18 +++++++++---------
> >> drivers/gpu/drm/i915/intel_display.c |  6 +++---
> >>  drivers/gpu/drm/i915/intel_drv.h     |  2 +-
> >>  drivers/gpu/drm/i915/intel_dsi.h     | 21 ++++++++++-----------
> >>  drivers/gpu/drm/i915/intel_dsi_vbt.c |  2 +-
> >>  6 files changed, 34 insertions(+), 36 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/gen7_dsi.c
> >> b/drivers/gpu/drm/i915/gen7_dsi.c index 3b7acb5a70b3..6dd5e9988221
> >> 100644
> >> --- a/drivers/gpu/drm/i915/gen7_dsi.c
> >> +++ b/drivers/gpu/drm/i915/gen7_dsi.c
> >> @@ -69,7 +69,7 @@ enum mipi_dsi_pixel_format
> >> pixel_format_from_register_bits(u32 fmt)
> >
> > What about this function i.e. enum mipi_dsi_pixel_format
> pixel_format_from_register_bits()??
> > This will be used by gen11_dsi.c and currently getting used inside
> intel_dsi_vbt.c.
> 
> Let it be for now. If we ever reach an agreement over what the filenames
> should be (argh!) we can afterwards repurpose intel_dsi.c for any common
> stuff.

Agree.

Reviewed-by: Madhav Chauhan <madhav.chauhan@intel.com>

Regards,
Madhav
> 
> BR,
> Jani.
> 
> >
> > Regards,
> > Madhav
> >
> >>  	}
> >>  }
> >>
> >> -void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port
> >> port)
> >> +void gen7_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum
> >> +port port)
> >>  {
> >>  	struct drm_encoder *encoder = &intel_dsi->base.base;
> >>  	struct drm_device *dev = encoder->dev; @@ -344,7 +344,7 @@
> static
> >> bool intel_dsi_compute_config(struct intel_encoder *encoder,
> >>  			pipe_config->cpu_transcoder = TRANSCODER_DSI_A;
> >>  	}
> >>
> >> -	ret = intel_compute_dsi_pll(encoder, pipe_config);
> >> +	ret = gen7_dsi_pll_compute(encoder, pipe_config);
> >>  	if (ret)
> >>  		return false;
> >>
> >> @@ -810,8 +810,8 @@ static void intel_dsi_pre_enable(struct
> >> intel_encoder *encoder,
> >>  	 * The BIOS may leave the PLL in a wonky state where it doesn't
> >>  	 * lock. It needs to be fully powered down to fix it.
> >>  	 */
> >> -	intel_disable_dsi_pll(encoder);
> >> -	intel_enable_dsi_pll(encoder, pipe_config);
> >> +	gen7_dsi_pll_disable(encoder);
> >> +	gen7_dsi_pll_enable(encoder, pipe_config);
> >>
> >>  	if (IS_BROXTON(dev_priv)) {
> >>  		/* Add MIPI IO reset programming for modeset */ @@ -
> >> 949,7 +949,7 @@ static void intel_dsi_post_disable(struct
> >> intel_encoder *encoder,
> >>
> >>  	if (is_vid_mode(intel_dsi)) {
> >>  		for_each_dsi_port(port, intel_dsi->ports)
> >> -			wait_for_dsi_fifo_empty(intel_dsi, port);
> >> +			gen7_dsi_wait_for_fifo_empty(intel_dsi, port);
> >>
> >>  		intel_dsi_port_disable(encoder);
> >>  		usleep_range(2000, 5000);
> >> @@ -979,7 +979,7 @@ static void intel_dsi_post_disable(struct
> >> intel_encoder *encoder,
> >>  				val & ~MIPIO_RST_CTRL);
> >>  	}
> >>
> >> -	intel_disable_dsi_pll(encoder);
> >> +	gen7_dsi_pll_disable(encoder);
> >>
> >>  	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> >>  		u32 val;
> >> @@ -1024,7 +1024,7 @@ static bool intel_dsi_get_hw_state(struct
> >> intel_encoder *encoder,
> >>  	 * configuration, otherwise accessing DSI registers will hang the
> >>  	 * machine. See BSpec North Display Engine registers/MIPI[BXT].
> >>  	 */
> >> -	if (IS_GEN9_LP(dev_priv) && !intel_dsi_pll_is_enabled(dev_priv))
> >> +	if (IS_GEN9_LP(dev_priv) && !gen7_dsi_pll_is_enabled(dev_priv))
> >>  		goto out_put_power;
> >>
> >>  	/* XXX: this only works for one DSI output */ @@ -1250,8 +1250,7
> @@
> >> static void intel_dsi_get_config(struct intel_encoder *encoder,
> >>  	if (IS_GEN9_LP(dev_priv))
> >>  		bxt_dsi_get_pipe_config(encoder, pipe_config);
> >>
> >> -	pclk = intel_dsi_get_pclk(encoder, pipe_config->pipe_bpp,
> >> -				  pipe_config);
> >> +	pclk = gen7_dsi_get_pclk(encoder, pipe_config->pipe_bpp,
> >> pipe_config);
> >>  	if (!pclk)
> >>  		return;
> >>
> >> @@ -1590,7 +1589,7 @@ static void intel_dsi_unprepare(struct
> >> intel_encoder *encoder)
> >>  			/* Panel commands can be sent when clock is in LP11
> */
> >>  			I915_WRITE(MIPI_DEVICE_READY(port), 0x0);
> >>
> >> -			intel_dsi_reset_clocks(encoder, port);
> >> +			gen7_dsi_reset_clocks(encoder, port);
> >>  			I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);
> >>
> >>  			val = I915_READ(MIPI_DSI_FUNC_PRG(port));
> >> @@ -1713,7 +1712,7 @@ static void intel_dsi_add_properties(struct
> >> intel_connector *connector)
> >>  	}
> >>  }
> >>
> >> -void intel_dsi_init(struct drm_i915_private *dev_priv)
> >> +void gen7_dsi_init(struct drm_i915_private *dev_priv)
> >>  {
> >>  	struct drm_device *dev = &dev_priv->drm;
> >>  	struct intel_dsi *intel_dsi;
> >> diff --git a/drivers/gpu/drm/i915/gen7_dsi_pll.c
> >> b/drivers/gpu/drm/i915/gen7_dsi_pll.c
> >> index 2ff2ee7f3b78..bb46996a5843 100644
> >> --- a/drivers/gpu/drm/i915/gen7_dsi_pll.c
> >> +++ b/drivers/gpu/drm/i915/gen7_dsi_pll.c
> >> @@ -357,8 +357,8 @@ static u32 bxt_dsi_get_pclk(struct intel_encoder
> >> *encoder, int pipe_bpp,
> >>  	return pclk;
> >>  }
> >>
> >> -u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
> >> -		       struct intel_crtc_state *config)
> >> +u32 gen7_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
> >> +		      struct intel_crtc_state *config)
> >>  {
> >>  	if (IS_GEN9_LP(to_i915(encoder->base.dev)))
> >>  		return bxt_dsi_get_pclk(encoder, pipe_bpp, config); @@ -
> >> 568,7 +568,7 @@ static void gen9lp_enable_dsi_pll(struct
> >> intel_encoder *encoder,
> >>  	DRM_DEBUG_KMS("DSI PLL locked\n");
> >>  }
> >>
> >> -bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
> >> +bool gen7_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
> >>  {
> >>  	if (IS_GEN9_LP(dev_priv))
> >>  		return bxt_dsi_pll_is_enabled(dev_priv); @@ -578,8 +578,8
> @@ bool
> >> intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
> >>  	return false;
> >>  }
> >>
> >> -int intel_compute_dsi_pll(struct intel_encoder *encoder,
> >> -			  struct intel_crtc_state *config)
> >> +int gen7_dsi_pll_compute(struct intel_encoder *encoder,
> >> +			 struct intel_crtc_state *config)
> >>  {
> >>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >>
> >> @@ -591,8 +591,8 @@ int intel_compute_dsi_pll(struct intel_encoder
> >> *encoder,
> >>  	return -ENODEV;
> >>  }
> >>
> >> -void intel_enable_dsi_pll(struct intel_encoder *encoder,
> >> -			  const struct intel_crtc_state *config)
> >> +void gen7_dsi_pll_enable(struct intel_encoder *encoder,
> >> +			 const struct intel_crtc_state *config)
> >>  {
> >>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >>
> >> @@ -602,7 +602,7 @@ void intel_enable_dsi_pll(struct intel_encoder
> >> *encoder,
> >>  		gen9lp_enable_dsi_pll(encoder, config);  }
> >>
> >> -void intel_disable_dsi_pll(struct intel_encoder *encoder)
> >> +void gen7_dsi_pll_disable(struct intel_encoder *encoder)
> >>  {
> >>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >>
> >> @@ -639,7 +639,7 @@ static void gen9lp_dsi_reset_clocks(struct
> >> intel_encoder *encoder,
> >>  	I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);  }
> >>
> >> -void intel_dsi_reset_clocks(struct intel_encoder *encoder, enum port
> >> port)
> >> +void gen7_dsi_reset_clocks(struct intel_encoder *encoder, enum port
> >> +port)
> >>  {
> >>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_display.c
> >> b/drivers/gpu/drm/i915/intel_display.c
> >> index 681e0710a467..e94a2d65b4a4 100644
> >> --- a/drivers/gpu/drm/i915/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/intel_display.c
> >> @@ -9414,7 +9414,7 @@ static bool bxt_get_dsi_transcoder_state(struct
> >> intel_crtc *crtc,
> >>  		 * registers/MIPI[BXT]. We can break out here early, since we
> >>  		 * need the same DSI PLL to be enabled for both DSI ports.
> >>  		 */
> >> -		if (!intel_dsi_pll_is_enabled(dev_priv))
> >> +		if (!gen7_dsi_pll_is_enabled(dev_priv))
> >>  			break;
> >>
> >>  		/* XXX: this works for video mode only */ @@ -14133,7
> >> +14133,7 @@ static void intel_setup_outputs(struct drm_i915_private
> >> *dev_priv)
> >>  		intel_ddi_init(dev_priv, PORT_B);
> >>  		intel_ddi_init(dev_priv, PORT_C);
> >>
> >> -		intel_dsi_init(dev_priv);
> >> +		gen7_dsi_init(dev_priv);
> >>  	} else if (HAS_DDI(dev_priv)) {
> >>  		int found;
> >>
> >> @@ -14239,7 +14239,7 @@ static void intel_setup_outputs(struct
> >> drm_i915_private *dev_priv)
> >>  				intel_hdmi_init(dev_priv, CHV_HDMID,
> PORT_D);
> >>  		}
> >>
> >> -		intel_dsi_init(dev_priv);
> >> +		gen7_dsi_init(dev_priv);
> >>  	} else if (!IS_GEN2(dev_priv) && !IS_PINEVIEW(dev_priv)) {
> >>  		bool found = false;
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> >> b/drivers/gpu/drm/i915/intel_drv.h
> >> index 888a85dc3856..7fd0bb25bf84 100644
> >> --- a/drivers/gpu/drm/i915/intel_drv.h
> >> +++ b/drivers/gpu/drm/i915/intel_drv.h
> >> @@ -1731,7 +1731,7 @@ int intel_dp_aux_init_backlight_funcs(struct
> >> intel_connector *intel_connector);  int
> >> intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port,
> >> int conn_id);  void intel_dp_mst_encoder_cleanup(struct
> >> intel_digital_port *intel_dig_port);
> >>  /* gen7_dsi.c */
> >> -void intel_dsi_init(struct drm_i915_private *dev_priv);
> >> +void gen7_dsi_init(struct drm_i915_private *dev_priv);
> >>
> >>  /* intel_dsi_dcs_backlight.c */
> >>  int intel_dsi_dcs_init_backlight_funcs(struct intel_connector
> >> *intel_connector); diff --git a/drivers/gpu/drm/i915/intel_dsi.h
> >> b/drivers/gpu/drm/i915/intel_dsi.h
> >> index 1b5c2c167472..b87f2531aeea 100644
> >> --- a/drivers/gpu/drm/i915/intel_dsi.h
> >> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> >> @@ -130,20 +130,19 @@ static inline struct intel_dsi
> >> *enc_to_intel_dsi(struct drm_encoder *encoder)  }
> >>
> >>  /* gen7_dsi.c */
> >> -void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port
> >> port);
> >> +void gen7_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum
> >> +port port);
> >>  enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
> >>
> >>  /* gen7_dsi_pll.c */
> >> -bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
> >> -int intel_compute_dsi_pll(struct intel_encoder *encoder,
> >> -			  struct intel_crtc_state *config);
> >> -void intel_enable_dsi_pll(struct intel_encoder *encoder,
> >> -			  const struct intel_crtc_state *config);
> >> -void intel_disable_dsi_pll(struct intel_encoder *encoder);
> >> -u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
> >> -		       struct intel_crtc_state *config);
> >> -void intel_dsi_reset_clocks(struct intel_encoder *encoder,
> >> -			    enum port port);
> >> +bool gen7_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); int
> >> +gen7_dsi_pll_compute(struct intel_encoder *encoder,
> >> +			 struct intel_crtc_state *config); void
> >> +gen7_dsi_pll_enable(struct intel_encoder *encoder,
> >> +			 const struct intel_crtc_state *config); void
> >> +gen7_dsi_pll_disable(struct intel_encoder *encoder);
> >> +u32 gen7_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
> >> +		      struct intel_crtc_state *config); void
> >> +gen7_dsi_reset_clocks(struct intel_encoder *encoder, enum port
> >> +port);
> >>
> >>  /* intel_dsi_vbt.c */
> >>  bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
> >> diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c
> >> b/drivers/gpu/drm/i915/intel_dsi_vbt.c
> >> index 4d6ffa7b3e7b..0f4bf9541e84 100644
> >> --- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
> >> +++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
> >> @@ -181,7 +181,7 @@ static const u8 *mipi_exec_send_packet(struct
> >> intel_dsi *intel_dsi,
> >>  		break;
> >>  	}
> >>
> >> -	wait_for_dsi_fifo_empty(intel_dsi, port);
> >> +	gen7_dsi_wait_for_fifo_empty(intel_dsi, port);
> >>
> >>  out:
> >>  	data += len;
> >> --
> >> 2.11.0
> >
> 
> --
> Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2 1/2] drm/i915/dsi: rename the current DSI files based on generation

[Chauhan, Madhav]

> -----Original Message-----
> From: Nikula, Jani
> Sent: Tuesday, July 3, 2018 7:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; Chauhan, Madhav
> <madhav.chauhan@intel.com>; Daniel Vetter <daniel@ffwll.ch>; Chris
> Wilson <chris@chris-wilson.co.uk>
> Subject: [PATCH v2 1/2] drm/i915/dsi: rename the current DSI files based on
> generation
> 
> Starting from ICL or gen 11 we have a new DSI block which requires
> completely different programming from the current implementation. Having
> them in the same file would be confusing. Rename the current DSI and DSI
> PLL implementation files as gen7_dsi.c and gen7_dsi_pll.c.
> 
> No functional changes.

This looks fine to me,
Reviewed-by: Madhav Chauhan <madhav.chauhan@intel.com>

Regards,
Madhav

> 
> References: https://patchwork.freedesktop.org/series/44823/
> Cc: Madhav Chauhan <madhav.chauhan@intel.com>
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile                            | 4 ++--
>  drivers/gpu/drm/i915/{intel_dsi.c => gen7_dsi.c}         | 0
>  drivers/gpu/drm/i915/{intel_dsi_pll.c => gen7_dsi_pll.c} | 0
>  drivers/gpu/drm/i915/intel_drv.h                         | 2 +-
>  drivers/gpu/drm/i915/intel_dsi.h                         | 4 ++--
>  5 files changed, 5 insertions(+), 5 deletions(-)  rename
> drivers/gpu/drm/i915/{intel_dsi.c => gen7_dsi.c} (100%)  rename
> drivers/gpu/drm/i915/{intel_dsi_pll.c => gen7_dsi_pll.c} (100%)
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 4c6adae23e18..a1cfb3a3926b 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -135,15 +135,15 @@ i915-y += dvo_ch7017.o \
>  	  dvo_ns2501.o \
>  	  dvo_sil164.o \
>  	  dvo_tfp410.o \
> +	  gen7_dsi.o \
> +	  gen7_dsi_pll.o \
>  	  intel_crt.o \
>  	  intel_ddi.o \
>  	  intel_dp_aux_backlight.o \
>  	  intel_dp_link_training.o \
>  	  intel_dp_mst.o \
>  	  intel_dp.o \
> -	  intel_dsi.o \
>  	  intel_dsi_dcs_backlight.o \
> -	  intel_dsi_pll.o \
>  	  intel_dsi_vbt.o \
>  	  intel_dvo.o \
>  	  intel_hdmi.o \
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c
> b/drivers/gpu/drm/i915/gen7_dsi.c similarity index 100% rename from
> drivers/gpu/drm/i915/intel_dsi.c rename to
> drivers/gpu/drm/i915/gen7_dsi.c diff --git
> a/drivers/gpu/drm/i915/intel_dsi_pll.c
> b/drivers/gpu/drm/i915/gen7_dsi_pll.c
> similarity index 100%
> rename from drivers/gpu/drm/i915/intel_dsi_pll.c
> rename to drivers/gpu/drm/i915/gen7_dsi_pll.c
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index b9b70321c054..888a85dc3856 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1730,7 +1730,7 @@ int intel_dp_aux_init_backlight_funcs(struct
> intel_connector *intel_connector);
>  /* intel_dp_mst.c */
>  int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int
> conn_id);  void intel_dp_mst_encoder_cleanup(struct intel_digital_port
> *intel_dig_port);
> -/* intel_dsi.c */
> +/* gen7_dsi.c */
>  void intel_dsi_init(struct drm_i915_private *dev_priv);
> 
>  /* intel_dsi_dcs_backlight.c */
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h
> b/drivers/gpu/drm/i915/intel_dsi.h
> index 7afeb9580f41..1b5c2c167472 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -129,11 +129,11 @@ static inline struct intel_dsi
> *enc_to_intel_dsi(struct drm_encoder *encoder)
>  	return container_of(encoder, struct intel_dsi, base.base);  }
> 
> -/* intel_dsi.c */
> +/* gen7_dsi.c */
>  void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
> enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
> 
> -/* intel_dsi_pll.c */
> +/* gen7_dsi_pll.c */
>  bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);  int
> intel_compute_dsi_pll(struct intel_encoder *encoder,
>  			  struct intel_crtc_state *config);
> --
> 2.11.0

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Re: [PATCH v2 1/2] drm/i915/dsi: rename the current DSI files based on generation

[Ville Syrjälä]

On Tue, Jul 03, 2018 at 04:53:28PM +0300, Jani Nikula wrote:
> Starting from ICL or gen 11 we have a new DSI block which requires
> completely different programming from the current implementation. Having
> them in the same file would be confusing. Rename the current DSI and DSI
> PLL implementation files as gen7_dsi.c and gen7_dsi_pll.c.

gen7 is a rather odd name for this. vlv would seem more
appropriate, though not particularly good either.

> 
> No functional changes.
> 
> References: https://patchwork.freedesktop.org/series/44823/
> Cc: Madhav Chauhan <madhav.chauhan@intel.com>
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile                            | 4 ++--
>  drivers/gpu/drm/i915/{intel_dsi.c => gen7_dsi.c}         | 0
>  drivers/gpu/drm/i915/{intel_dsi_pll.c => gen7_dsi_pll.c} | 0
>  drivers/gpu/drm/i915/intel_drv.h                         | 2 +-
>  drivers/gpu/drm/i915/intel_dsi.h                         | 4 ++--
>  5 files changed, 5 insertions(+), 5 deletions(-)
>  rename drivers/gpu/drm/i915/{intel_dsi.c => gen7_dsi.c} (100%)
>  rename drivers/gpu/drm/i915/{intel_dsi_pll.c => gen7_dsi_pll.c} (100%)
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 4c6adae23e18..a1cfb3a3926b 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -135,15 +135,15 @@ i915-y += dvo_ch7017.o \
>  	  dvo_ns2501.o \
>  	  dvo_sil164.o \
>  	  dvo_tfp410.o \
> +	  gen7_dsi.o \
> +	  gen7_dsi_pll.o \
>  	  intel_crt.o \
>  	  intel_ddi.o \
>  	  intel_dp_aux_backlight.o \
>  	  intel_dp_link_training.o \
>  	  intel_dp_mst.o \
>  	  intel_dp.o \
> -	  intel_dsi.o \
>  	  intel_dsi_dcs_backlight.o \
> -	  intel_dsi_pll.o \
>  	  intel_dsi_vbt.o \
>  	  intel_dvo.o \
>  	  intel_hdmi.o \
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/gen7_dsi.c
> similarity index 100%
> rename from drivers/gpu/drm/i915/intel_dsi.c
> rename to drivers/gpu/drm/i915/gen7_dsi.c
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/gen7_dsi_pll.c
> similarity index 100%
> rename from drivers/gpu/drm/i915/intel_dsi_pll.c
> rename to drivers/gpu/drm/i915/gen7_dsi_pll.c
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index b9b70321c054..888a85dc3856 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1730,7 +1730,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector);
>  /* intel_dp_mst.c */
>  int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id);
>  void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
> -/* intel_dsi.c */
> +/* gen7_dsi.c */
>  void intel_dsi_init(struct drm_i915_private *dev_priv);
>  
>  /* intel_dsi_dcs_backlight.c */
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
> index 7afeb9580f41..1b5c2c167472 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -129,11 +129,11 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
>  	return container_of(encoder, struct intel_dsi, base.base);
>  }
>  
> -/* intel_dsi.c */
> +/* gen7_dsi.c */
>  void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
>  enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
>  
> -/* intel_dsi_pll.c */
> +/* gen7_dsi_pll.c */
>  bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
>  int intel_compute_dsi_pll(struct intel_encoder *encoder,
>  			  struct intel_crtc_state *config);
> -- 
> 2.11.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
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Re: [PATCH v2 1/2] drm/i915/dsi: rename the current DSI files based on generation

[Jani Nikula]

On Tue, 03 Jul 2018, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Jul 03, 2018 at 04:53:28PM +0300, Jani Nikula wrote:
>> Starting from ICL or gen 11 we have a new DSI block which requires
>> completely different programming from the current implementation. Having
>> them in the same file would be confusing. Rename the current DSI and DSI
>> PLL implementation files as gen7_dsi.c and gen7_dsi_pll.c.
>
> gen7 is a rather odd name for this. vlv would seem more
> appropriate, though not particularly good either.

Daniel and Chris suggested a gen based name, and specifically to name
both the old and new with a prefix. I guess I would've gone with
"legacy" or "byt". Madhav has gone for gen11 prefixed function naming in
the new series.

I find myself caring less and less, as long as we reach some consensus
on the name.

BR,
Jani.



>
>> 
>> No functional changes.
>> 
>> References: https://patchwork.freedesktop.org/series/44823/
>> Cc: Madhav Chauhan <madhav.chauhan@intel.com>
>> Cc: Daniel Vetter <daniel@ffwll.ch>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/Makefile                            | 4 ++--
>>  drivers/gpu/drm/i915/{intel_dsi.c => gen7_dsi.c}         | 0
>>  drivers/gpu/drm/i915/{intel_dsi_pll.c => gen7_dsi_pll.c} | 0
>>  drivers/gpu/drm/i915/intel_drv.h                         | 2 +-
>>  drivers/gpu/drm/i915/intel_dsi.h                         | 4 ++--
>>  5 files changed, 5 insertions(+), 5 deletions(-)
>>  rename drivers/gpu/drm/i915/{intel_dsi.c => gen7_dsi.c} (100%)
>>  rename drivers/gpu/drm/i915/{intel_dsi_pll.c => gen7_dsi_pll.c} (100%)
>> 
>> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>> index 4c6adae23e18..a1cfb3a3926b 100644
>> --- a/drivers/gpu/drm/i915/Makefile
>> +++ b/drivers/gpu/drm/i915/Makefile
>> @@ -135,15 +135,15 @@ i915-y += dvo_ch7017.o \
>>  	  dvo_ns2501.o \
>>  	  dvo_sil164.o \
>>  	  dvo_tfp410.o \
>> +	  gen7_dsi.o \
>> +	  gen7_dsi_pll.o \
>>  	  intel_crt.o \
>>  	  intel_ddi.o \
>>  	  intel_dp_aux_backlight.o \
>>  	  intel_dp_link_training.o \
>>  	  intel_dp_mst.o \
>>  	  intel_dp.o \
>> -	  intel_dsi.o \
>>  	  intel_dsi_dcs_backlight.o \
>> -	  intel_dsi_pll.o \
>>  	  intel_dsi_vbt.o \
>>  	  intel_dvo.o \
>>  	  intel_hdmi.o \
>> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/gen7_dsi.c
>> similarity index 100%
>> rename from drivers/gpu/drm/i915/intel_dsi.c
>> rename to drivers/gpu/drm/i915/gen7_dsi.c
>> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/gen7_dsi_pll.c
>> similarity index 100%
>> rename from drivers/gpu/drm/i915/intel_dsi_pll.c
>> rename to drivers/gpu/drm/i915/gen7_dsi_pll.c
>> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>> index b9b70321c054..888a85dc3856 100644
>> --- a/drivers/gpu/drm/i915/intel_drv.h
>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>> @@ -1730,7 +1730,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector);
>>  /* intel_dp_mst.c */
>>  int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id);
>>  void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
>> -/* intel_dsi.c */
>> +/* gen7_dsi.c */
>>  void intel_dsi_init(struct drm_i915_private *dev_priv);
>>  
>>  /* intel_dsi_dcs_backlight.c */
>> diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
>> index 7afeb9580f41..1b5c2c167472 100644
>> --- a/drivers/gpu/drm/i915/intel_dsi.h
>> +++ b/drivers/gpu/drm/i915/intel_dsi.h
>> @@ -129,11 +129,11 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
>>  	return container_of(encoder, struct intel_dsi, base.base);
>>  }
>>  
>> -/* intel_dsi.c */
>> +/* gen7_dsi.c */
>>  void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
>>  enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
>>  
>> -/* intel_dsi_pll.c */
>> +/* gen7_dsi_pll.c */
>>  bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
>>  int intel_compute_dsi_pll(struct intel_encoder *encoder,
>>  			  struct intel_crtc_state *config);
>> -- 
>> 2.11.0
>> 
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Graphics Center
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Re: [PATCH v2 1/2] drm/i915/dsi: rename the current DSI files based on generation

[Ville Syrjälä]

On Wed, Jul 04, 2018 at 11:10:06AM +0300, Jani Nikula wrote:
> On Tue, 03 Jul 2018, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Tue, Jul 03, 2018 at 04:53:28PM +0300, Jani Nikula wrote:
> >> Starting from ICL or gen 11 we have a new DSI block which requires
> >> completely different programming from the current implementation. Having
> >> them in the same file would be confusing. Rename the current DSI and DSI
> >> PLL implementation files as gen7_dsi.c and gen7_dsi_pll.c.
> >
> > gen7 is a rather odd name for this. vlv would seem more
> > appropriate, though not particularly good either.
> 
> Daniel and Chris suggested a gen based name, and specifically to name
> both the old and new with a prefix.

gen based names rarely make sense when it comes to the display. If
there's a display thing with a gen7 name I immediately think "oh
that's ivb, maybe also hsw", but never in a million years would
I think of vlv.

Also the gen naming for display has getting even more confusing
since glk display pipes were pulled in from cnl. So if you read the
spec and see a "gen10 display" note it generally applies to glk as
well, even though for us glk is gen9.

So I think the generally best bet is to never use a genX label on
any display code.

> I guess I would've gone with
> "legacy" or "byt". Madhav has gone for gen11 prefixed function naming in
> the new series.

"byt" I would not use because everything else is named "vlv". So
I guess "vlv" is what I would suggest here. Or that earlier
"legacy" idea.

-- 
Ville Syrjälä
Intel
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✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915/dsi: rename the current DSI files based on generation

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/2] drm/i915/dsi: rename the current DSI files based on generation
URL   : https://patchwork.freedesktop.org/series/45842/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
2f2fffcc177c drm/i915/dsi: rename the current DSI files based on generation
-:45: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#45: 
rename from drivers/gpu/drm/i915/intel_dsi.c

total: 0 errors, 1 warnings, 0 checks, 38 lines checked
84bc29fb9b4a drm/i915/dsi: use gen7 prefix for the global DSI functions

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✗ Fi.CI.SPARSE: warning for series starting with [v2,1/2] drm/i915/dsi: rename the current DSI files based on generation

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/2] drm/i915/dsi: rename the current DSI files based on generation
URL   : https://patchwork.freedesktop.org/series/45842/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Commit: drm/i915/dsi: rename the current DSI files based on generation
+drivers/gpu/drm/i915/gen7_dsi.c:113:33: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/gen7_dsi.c:97:33: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gen7_dsi.c:113:33: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gen7_dsi.c:97:33: warning: expression using sizeof(void)

Commit: drm/i915/dsi: use gen7 prefix for the global DSI functions
Okay!

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✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/dsi: rename the current DSI files based on generation

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/2] drm/i915/dsi: rename the current DSI files based on generation
URL   : https://patchwork.freedesktop.org/series/45842/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4423 -> Patchwork_9512 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/45842/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_9512 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-snb-2520m:       PASS -> INCOMPLETE (fdo#103713)

    
    ==== Possible fixes ====

    igt@gem_exec_suspend@basic-s3:
      {fi-cfl-8109u}:     INCOMPLETE -> PASS

    igt@kms_chamelium@dp-edid-read:
      fi-kbl-7500u:       FAIL (fdo#103841) -> PASS

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841


== Participating hosts (45 -> 41) ==

  Additional (1): fi-bxt-dsi 
  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4423 -> Patchwork_9512

  CI_DRM_4423: 9b9b45349fe3a36d41586992426d03a238396531 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4533: 199220052af977598033d3810ffb4cc32d377522 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9512: 84bc29fb9b4a7d759b32f750b47d299b16803bcc @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

84bc29fb9b4a drm/i915/dsi: use gen7 prefix for the global DSI functions
2f2fffcc177c drm/i915/dsi: rename the current DSI files based on generation

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9512/issues.html
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✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/dsi: rename the current DSI files based on generation

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/2] drm/i915/dsi: rename the current DSI files based on generation
URL   : https://patchwork.freedesktop.org/series/45842/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4423_full -> Patchwork_9512_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_9512_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_9512_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9512_full:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_exec_schedule@deep-blt:
      shard-kbl:          SKIP -> PASS +1

    igt@gem_exec_schedule@deep-bsd1:
      shard-kbl:          PASS -> SKIP

    
== Known issues ==

  Here are the changes found in Patchwork_9512_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_flip_tiling@flip-to-x-tiled:
      shard-glk:          PASS -> FAIL (fdo#104724, fdo#103822) +1

    igt@kms_setmode@basic:
      shard-kbl:          PASS -> FAIL (fdo#99912)

    igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
      shard-kbl:          PASS -> INCOMPLETE (fdo#103665)

    
    ==== Possible fixes ====

    igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
      shard-glk:          FAIL (fdo#104873) -> PASS

    igt@kms_flip@plain-flip-fb-recreate:
      shard-glk:          FAIL (fdo#100368) -> PASS +2

    igt@kms_flip_tiling@flip-to-y-tiled:
      shard-glk:          FAIL (fdo#104724, fdo#103822) -> PASS

    igt@kms_vblank@pipe-a-ts-continuation-suspend:
      shard-hsw:          FAIL (fdo#104894) -> PASS

    igt@perf@polling:
      shard-hsw:          FAIL (fdo#102252) -> PASS

    
    ==== Warnings ====

    igt@drv_selftest@live_gtt:
      shard-glk:          INCOMPLETE (fdo#103359, k.org#198133) -> FAIL (fdo#105347)

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
  fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
  fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
  fdo#104873 https://bugs.freedesktop.org/show_bug.cgi?id=104873
  fdo#104894 https://bugs.freedesktop.org/show_bug.cgi?id=104894
  fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
  k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4423 -> Patchwork_9512

  CI_DRM_4423: 9b9b45349fe3a36d41586992426d03a238396531 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4533: 199220052af977598033d3810ffb4cc32d377522 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9512: 84bc29fb9b4a7d759b32f750b47d299b16803bcc @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9512/shards.html
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