From: Jani Nikula <jani.nikula@linux.intel.com>
To: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>,
intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 0/3] CHV vblank failures when PSR is active
Date: Thu, 09 Jun 2016 11:31:20 +0300 [thread overview]
Message-ID: <877fdybw6f.fsf@intel.com> (raw)
In-Reply-To: <1465436764-29950-1-git-send-email-dhinakaran.pandiyan@intel.com>
On Thu, 09 Jun 2016, Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> wrote:
> IGT vblank tests fail on CHV by timing out on VBIs if PSR is enabled. We
> do not get VBIs as the source timing generation is disabled when PSR is
> active. The first two patches written by Rodrigo add drm hooks. Patch 3
> deactivates PSR when VBI are needed.
The first thing to do would be to submit a patch that disables PSR by
default on CHV. We can enable it again if and when these patches land.
BR,
Jani.
>
> [PATCH 1/3] drm: Add vblank prepare and unprepare hooks.
> [PATCH 2/3] drm/i915: Move drm_crtc_vblank_get out of disabled
> [PATCH 3/3] drm/i915/psr: Do not activate PSR when vblank interrupts
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2016-06-09 8:31 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-09 1:46 [PATCH 0/3] CHV vblank failures when PSR is active Dhinakaran Pandiyan
2016-06-09 1:46 ` [PATCH 1/3] drm: Add vblank prepare and unprepare hooks Dhinakaran Pandiyan
2016-06-10 21:21 ` REBASED: " Dhinakaran Pandiyan
2016-06-09 1:46 ` [PATCH 2/3] drm/i915: Move drm_crtc_vblank_get out of disabled pre-emption area Dhinakaran Pandiyan
2016-06-09 1:46 ` [PATCH 3/3] drm/i915/psr: Do not activate PSR when vblank interrupts are enabled Dhinakaran Pandiyan
2016-06-09 3:06 ` kbuild test robot
2016-06-14 0:09 ` Vivi, Rodrigo
2016-06-15 1:02 ` Pandiyan, Dhinakaran
2016-06-15 21:44 ` Vivi, Rodrigo
2016-06-24 18:39 ` Pandiyan, Dhinakaran
2016-06-09 5:00 ` ✗ Ro.CI.BAT: failure for CHV vblank failures when PSR is active Patchwork
2016-06-09 8:31 ` Jani Nikula [this message]
2016-06-09 8:35 ` [PATCH 0/3] " Ville Syrjälä
2016-06-11 6:32 ` ✗ Ro.CI.BAT: warning for CHV vblank failures when PSR is active (rev2) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=877fdybw6f.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=dhinakaran.pandiyan@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=rodrigo.vivi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox