From: Jani Nikula <jani.nikula@linux.intel.com>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Cc: Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: Re: [PATCH v2] drm/i915: Enable GSE interrupt on BDW+
Date: Mon, 23 May 2016 17:04:48 +0300 [thread overview]
Message-ID: <877fekeupr.fsf@intel.com> (raw)
In-Reply-To: <1463649283-28698-1-git-send-email-ville.syrjala@linux.intel.com>
On Thu, 19 May 2016, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We've never actually enabled or unmasked the GSE interrupt on BDW+,
> even though the interrupt handler was always prepared for it.
> Let's enable it and see what happens.
>
> Credit to Mark Kettenis who fixed this in the OpenBSD fork of the
> driver. He reports that it fixed the "ACPI _BCM/_BCQ-based
> brightness mechanism on a MacBookPro12,1 and a 3rd gen Lenovo X1
> Carbon" for them.
>
> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> References: http://lists.freedesktop.org/archives/intel-gfx/2015-December/081799.html
> Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl>
> Cc: Mark Kettenis <mark.kettenis@xs4all.nl>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> Nothing changed, just reposted for CI.
As I noted previously, I don't think we need this, but if you insist on
having it, please add a note about it in the commit message. With that,
Acked-by: Jani Nikula <jani.nikula@intel.com>
>
> drivers/gpu/drm/i915/i915_irq.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index f0d941455bed..4c271ea267bb 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3799,6 +3799,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
> uint32_t de_pipe_enables;
> u32 de_port_masked = GEN8_AUX_CHANNEL_A;
> u32 de_port_enables;
> + u32 de_misc_masked = GEN8_DE_MISC_GSE;
> enum pipe pipe;
>
> if (INTEL_INFO(dev_priv)->gen >= 9) {
> @@ -3834,6 +3835,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
> de_pipe_enables);
>
> GEN5_IRQ_INIT(GEN8_DE_PORT_, ~de_port_masked, de_port_enables);
> + GEN5_IRQ_INIT(GEN8_DE_MISC_, ~de_misc_masked, de_misc_masked);
> }
>
> static int gen8_irq_postinstall(struct drm_device *dev)
--
Jani Nikula, Intel Open Source Technology Center
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next prev parent reply other threads:[~2016-05-23 14:07 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-01 22:17 [PATCH] drm/i915: Enable GSE interrupt on BDW+ ville.syrjala
2015-12-04 10:41 ` Daniel Vetter
2015-12-04 12:59 ` Jani Nikula
2015-12-07 2:05 ` Aaron Lu
2016-05-19 9:14 ` [PATCH v2] " ville.syrjala
2016-05-23 14:04 ` Jani Nikula [this message]
2016-05-23 14:33 ` Mark Kettenis
2016-05-23 14:44 ` Jani Nikula
2016-05-23 15:38 ` Ville Syrjälä
2016-05-19 10:02 ` ✗ Ro.CI.BAT: failure for drm/i915: Enable GSE interrupt on BDW+ (rev2) Patchwork
2016-05-19 11:47 ` Ville Syrjälä
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