From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH v2] drm/i915/hsw: Fix workaround for server AUX channel clock divisor Date: Thu, 28 May 2015 13:33:50 +0300 Message-ID: <877frtgfe9.fsf@intel.com> References: <1432747308-345-1-git-send-email-jim.bride@linux.intel.com> <87iobdwa81.fsf@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 90A456EB58 for ; Thu, 28 May 2015 03:32:03 -0700 (PDT) In-Reply-To: <87iobdwa81.fsf@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: jim.bride@linux.intel.com, intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gVGh1LCAyOCBNYXkgMjAxNSwgSmFuaSBOaWt1bGEgPGphbmkubmlrdWxhQGxpbnV4LmludGVs LmNvbT4gd3JvdGU6Cj4gT24gV2VkLCAyNyBNYXkgMjAxNSwgamltLmJyaWRlQGxpbnV4LmludGVs LmNvbSB3cm90ZToKPj4gRnJvbTogSmltIEJyaWRlIDxqaW0uYnJpZGVAbGludXguaW50ZWwuY29t Pgo+Pgo+PiBBY2NvcmRpbmcgdG8gdGhlIEhTVyBiLXNwZWMgd2UgbmVlZCB0byB0cnkgY2xvY2sg ZGl2aXNvcnMgb2YgNjMKPj4gYW5kIDcyLCBlYWNoIDMgb3IgbW9yZSB0aW1lcywgd2hlbiBhdHRl bXB0aW5nIERQIEFVWCBjaGFubmVsCj4+IGNvbW11bmljYXRpb24gb24gYSBzZXJ2ZXIgY2hpcHNl dC4gIFRoaXMgYWN0dWFsbHkgd2Fzbid0IGhhcHBlbmluZwo+PiBkdWUgdG8gYSBzaG9ydC1jaXJj dWl0IHRoYXQgb25seSBjaGVja2VkIHRoZSBEUF9BVVhfQ0hfQ1RMX0RPTkUgYml0Cj4+IGluIHN0 YXR1cyByYXRoZXIgdGhhbiBjaGVja2luZyB0aGF0IHRoZSBvcGVyYXRpb24gd2FzIGRvbmUgYW5k Cj4+IHRoYXQgRFBfQVVYX0NIX0NUTF9USU1FX09VVF9FUlJPUiB3YXMgbm90IHNldC4KPj4KPj4g W3YyXSBJbXBsZW1lbnRlZCBhbHRlcm5hdGUgc29sdXRpb24gc3VnZ2VzdGVkIGJ5IEphbmkgTmlr dWxhLgo+Pgo+PiBTaWduZWQtb2ZmLWJ5OiBKaW0gQnJpZGUgPGppbS5icmlkZUBsaW51eC5pbnRl bC5jb20+Cj4KPiBDYzogc3RhYmxlQHZnZXIua2VybmVsLm9yZwo+IFJldmlld2VkLWJ5OiBKYW5p IE5pa3VsYSA8amFuaS5uaWt1bGFAaW50ZWwuY29tPgoKLi4uYW5kIHB1c2hlZCB0byBkcm0taW50 ZWwtZml4ZXMsIHRoYW5rcyBmb3IgdGhlIHBhdGNoLgoKQlIsCkphbmkuCgo+Cj4+IC0tLQo+PiAg ZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZHAuYyB8IDUgKystLS0KPj4gIDEgZmlsZSBjaGFu Z2VkLCAyIGluc2VydGlvbnMoKyksIDMgZGVsZXRpb25zKC0pCj4+Cj4+IGRpZmYgLS1naXQgYS9k cml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9kcC5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50 ZWxfZHAuYwo+PiBpbmRleCAwZWRjMzA1Li43ZDFlMDI0IDEwMDY0NAo+PiAtLS0gYS9kcml2ZXJz L2dwdS9kcm0vaTkxNS9pbnRlbF9kcC5jCj4+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2lu dGVsX2RwLmMKPj4gQEAgLTg5MywxMCArODkzLDggQEAgaW50ZWxfZHBfYXV4X2NoKHN0cnVjdCBp bnRlbF9kcCAqaW50ZWxfZHAsCj4+ICAJCQkJY29udGludWU7Cj4+ICAJCQl9Cj4+ICAJCQlpZiAo c3RhdHVzICYgRFBfQVVYX0NIX0NUTF9ET05FKQo+PiAtCQkJCWJyZWFrOwo+PiArCQkJCWdvdG8g ZG9uZTsKPj4gIAkJfQo+PiAtCQlpZiAoc3RhdHVzICYgRFBfQVVYX0NIX0NUTF9ET05FKQo+PiAt CQkJYnJlYWs7Cj4+ICAJfQo+PiAgCj4+ICAJaWYgKChzdGF0dXMgJiBEUF9BVVhfQ0hfQ1RMX0RP TkUpID09IDApIHsKPj4gQEAgLTkwNSw2ICs5MDMsNyBAQCBpbnRlbF9kcF9hdXhfY2goc3RydWN0 IGludGVsX2RwICppbnRlbF9kcCwKPj4gIAkJZ290byBvdXQ7Cj4+ICAJfQo+PiAgCj4+ICtkb25l Ogo+PiAgCS8qIENoZWNrIGZvciB0aW1lb3V0IG9yIHJlY2VpdmUgZXJyb3IuCj4+ICAJICogVGlt ZW91dHMgb2NjdXIgd2hlbiB0aGUgc2luayBpcyBub3QgY29ubmVjdGVkCj4+ICAJICovCj4+IC0t IAo+PiAxLjkuMQo+Pgo+Cj4gLS0gCj4gSmFuaSBOaWt1bGEsIEludGVsIE9wZW4gU291cmNlIFRl Y2hub2xvZ3kgQ2VudGVyCgotLSAKSmFuaSBOaWt1bGEsIEludGVsIE9wZW4gU291cmNlIFRlY2hu b2xvZ3kgQ2VudGVyCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9y ZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4 Cg==