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* [PATCH v2] drm/i915/hsw: Fix workaround for server AUX channel clock divisor
@ 2015-05-27 17:21 jim.bride
  2015-05-28  5:18 ` Jani Nikula
  0 siblings, 1 reply; 3+ messages in thread
From: jim.bride @ 2015-05-27 17:21 UTC (permalink / raw)
  To: intel-gfx

From: Jim Bride <jim.bride@linux.intel.com>

According to the HSW b-spec we need to try clock divisors of 63
and 72, each 3 or more times, when attempting DP AUX channel
communication on a server chipset.  This actually wasn't happening
due to a short-circuit that only checked the DP_AUX_CH_CTL_DONE bit
in status rather than checking that the operation was done and
that DP_AUX_CH_CTL_TIME_OUT_ERROR was not set.

[v2] Implemented alternate solution suggested by Jani Nikula.

Signed-off-by: Jim Bride <jim.bride@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0edc305..7d1e024 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -893,10 +893,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
 				continue;
 			}
 			if (status & DP_AUX_CH_CTL_DONE)
-				break;
+				goto done;
 		}
-		if (status & DP_AUX_CH_CTL_DONE)
-			break;
 	}
 
 	if ((status & DP_AUX_CH_CTL_DONE) == 0) {
@@ -905,6 +903,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
 		goto out;
 	}
 
+done:
 	/* Check for timeout or receive error.
 	 * Timeouts occur when the sink is not connected
 	 */
-- 
1.9.1

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^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2015-05-28 10:32 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2015-05-27 17:21 [PATCH v2] drm/i915/hsw: Fix workaround for server AUX channel clock divisor jim.bride
2015-05-28  5:18 ` Jani Nikula
2015-05-28 10:33   ` Jani Nikula

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