From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 21CEBC761A6 for ; Sat, 1 Apr 2023 02:44:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C9D2510E304; Sat, 1 Apr 2023 02:44:53 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 05E9910E304; Sat, 1 Apr 2023 02:44:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1680317091; x=1711853091; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=6gcaX3TGRzi7wOjL98ihHuvtlBHyz0TTPgp4LjHB65Y=; b=M2PPBIBVAUwOSC6jRtmQOTM67tIKjIHt7ORMFHMljNBApkiv29QUysDn 4AJqdpKCtb3mw1wsKdhg0wbhrLcQzhMK9dvO7E++MLdvbxtaobTBpf0Ad rPSUWzJlgEGnY34lOTVVbriNCGAwiO2GbA97NjSR0rZ4moWUUvRCtWTO8 fjF5eoVOnPUn578AnTJTYQhvv9vb+54ws6y5tFci36enfntTfvW/6xnSk ophE5VheRo0Z9N6eGfmdWR6N81ea2X89HryjbJNkoWvPXE/bagsWo3SNp yzL073VJGXLhmlV3Yiq00e3YPSVeWQXtSTlF9jBSUgfie5/gPJ5ZNhSlY Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10666"; a="321257899" X-IronPort-AV: E=Sophos;i="5.98,308,1673942400"; d="scan'208";a="321257899" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Mar 2023 19:44:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10666"; a="809231982" X-IronPort-AV: E=Sophos;i="5.98,308,1673942400"; d="scan'208";a="809231982" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.209.61.228]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Mar 2023 19:44:50 -0700 Date: Fri, 31 Mar 2023 19:44:49 -0700 Message-ID: <878rfcgw2m.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Tvrtko Ursulin In-Reply-To: <3efd6c5d-cd3a-f562-fc61-a43e9bf003cb@linux.intel.com> References: <20230331022632.1388175-1-ashutosh.dixit@intel.com> <3efd6c5d-cd3a-f562-fc61-a43e9bf003cb@linux.intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/hwmon: Use 0 to designate disabled PL1 power limit X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Rodrigo Vivi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, 31 Mar 2023 03:23:33 -0700, Tvrtko Ursulin wrote: > Hi Tvrtko, > > @@ -385,8 +395,22 @@ static int > > hwm_power_max_write(struct hwm_drvdata *ddat, long val) > > { > > struct i915_hwmon *hwmon = ddat->hwmon; > > + intel_wakeref_t wakeref; > > u32 nval; > > + if (val == PL1_DISABLE) { > > + /* Disable PL1 limit */ > > + hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit, > > + PKG_PWR_LIM_1_EN, 0); > > + > > + /* Verify, because PL1 limit cannot be disabled on all platforms */ > > I think there is a race right here, since above grabbed and released the > hwmon_lock, anyone can modify it at this point before the verification > below. Not sure if any consequences worse than a wrong -EPERM are possible > though. > > Also, is EPERM correct for something hardware does not support? We usually > say ENODEV for such things, IIRC at least. Changed to -ENODEV in v3. > Anyway, race looks easily solvable by holding the existing mutex and a > single rpm ref for the whole rmw-r cycle. Fixed in v3, thanks for catching these. Ashutosh > > + with_intel_runtime_pm(ddat->uncore->rpm, wakeref) > > + nval = intel_uncore_read(ddat->uncore, hwmon->rg.pkg_rapl_limit); > > + if (nval & PKG_PWR_LIM_1_EN) > > + return -EPERM; > > + return 0; > > + } > > + > > /* Computation in 64-bits to avoid overflow. Round to nearest. */ > > nval = DIV_ROUND_CLOSEST_ULL((u64)val << hwmon->scl_shift_power, SF_POWER); > > nval = PKG_PWR_LIM_1_EN | REG_FIELD_PREP(PKG_PWR_LIM_1, nval);