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From: Jani Nikula <jani.nikula@intel.com>
To: Aditya Swarup <aditya.swarup@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915: Add N & CTS values for 10/12 bit deep color
Date: Mon, 01 Apr 2019 13:19:44 +0300	[thread overview]
Message-ID: <878swu10zj.fsf@intel.com> (raw)
In-Reply-To: <20190331094238.16855-2-aditya.swarup@intel.com>

On Sun, 31 Mar 2019, Aditya Swarup <aditya.swarup@intel.com> wrote:
> Adding N & CTS values for 10/12 bit deep color from Appendix C
> table in HDMI 2.0 spec. The correct values for N is not chosen
> automatically by hardware for deep color modes.
>
> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
> Cc: Clint Taylor <Clinton.A.Taylor@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_audio.c | 80 +++++++++++++++++++++++++++---
>  1 file changed, 74 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
> index 502b57ce72ab..285c65da2e4e 100644
> --- a/drivers/gpu/drm/i915/intel_audio.c
> +++ b/drivers/gpu/drm/i915/intel_audio.c
> @@ -182,6 +182,59 @@ static const struct {
>  	{ 192000, TMDS_594M, 24576, 594000 },
>  };
>  
> +/* Appendix C - N & CTS values for deep color from HDMI 2.0 spec*/
> +/* HDMI N/CTS table for 10 bit deep color(30 bpp)*/
> +#define TMDS_371M 371250
> +#define TMDS_370M 370878
> +
> +static const struct {
> +	int sample_rate;
> +	int clock;
> +	int n;
> +	int cts;
> +} hdmi_aud_ncts_30bpp[] = {
> +	{ 32000, TMDS_370M, 5824, 527344 },
> +	{ 32000, TMDS_371M, 6144, 556875 },
> +	{ 44100, TMDS_370M, 8918, 585938 },
> +	{ 44100, TMDS_371M, 4704, 309375 },
> +	{ 88200, TMDS_370M, 17836, 585938 },
> +	{ 88200, TMDS_371M, 9408, 309375 },
> +	{ 176400, TMDS_370M, 35672, 585938 },
> +	{ 176400, TMDS_371M, 18816, 309375 },
> +	{ 48000, TMDS_370M, 11648, 703125 },
> +	{ 48000, TMDS_371M, 5120, 309375 },
> +	{ 96000, TMDS_370M, 23296, 703125 },
> +	{ 96000, TMDS_371M, 10240, 309375 },
> +	{ 192000, TMDS_370M, 46592, 703125 },
> +	{ 192000, TMDS_371M, 20480, 309375 },
> +};
> +
> +/* HDMI N/CTS table for 12 bit deep color(36 bpp)*/
> +#define TMDS_445_5M 445500
> +#define TMDS_445M 445054
> +
> +static const struct {
> +	int sample_rate;
> +	int clock;
> +	int n;
> +	int cts;
> +} hdmi_aud_ncts_36bpp[] = {
> +	{ 32000, TMDS_445M, 5824, 632813 },
> +	{ 32000, TMDS_445_5M, 4096, 445500 },
> +	{ 44100, TMDS_445M, 8918, 703125 },
> +	{ 44100, TMDS_445_5M, 4704, 371250 },
> +	{ 88200, TMDS_445M, 17836, 703125 },
> +	{ 88200, TMDS_445_5M, 9408, 371250 },
> +	{ 176400, TMDS_445M, 35672, 703125 },
> +	{ 176400, TMDS_445_5M, 18816, 371250 },
> +	{ 48000, TMDS_445M, 5824, 421875 },
> +	{ 48000, TMDS_445_5M, 5120, 371250 },
> +	{ 96000, TMDS_445M, 11648, 421875 },
> +	{ 96000, TMDS_445_5M, 10240, 371250 },
> +	{ 192000, TMDS_445M, 23296, 421875 },
> +	{ 192000, TMDS_445_5M, 20480, 371250 },
> +};
> +
>  /* get AUD_CONFIG_PIXEL_CLOCK_HDMI_* value for mode */
>  static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_state)
>  {
> @@ -210,16 +263,31 @@ static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_sta
>  static int audio_config_hdmi_get_n(const struct intel_crtc_state *crtc_state,
>  				   int rate)
>  {
> -	const struct drm_display_mode *adjusted_mode =
> -		&crtc_state->base.adjusted_mode;
>  	int i;
>  
> -	for (i = 0; i < ARRAY_SIZE(hdmi_aud_ncts); i++) {
> -		if (rate == hdmi_aud_ncts[i].sample_rate &&
> -		    adjusted_mode->crtc_clock == hdmi_aud_ncts[i].clock) {
> -			return hdmi_aud_ncts[i].n;
> +	if (crtc_state->pipe_bpp == 36) {
> +		for (i = 0; i < ARRAY_SIZE(hdmi_aud_ncts_36bpp); i++) {
> +			if (rate == hdmi_aud_ncts_36bpp[i].sample_rate &&
> +			    crtc_state->port_clock == hdmi_aud_ncts_36bpp[i].clock) {
> +				return hdmi_aud_ncts_36bpp[i].n;
> +			}
> +		}
> +	} else if (crtc_state->pipe_bpp == 30) {
> +		for (i = 0; i < ARRAY_SIZE(hdmi_aud_ncts_30bpp); i++) {
> +			if (rate == hdmi_aud_ncts_30bpp[i].sample_rate &&
> +			    crtc_state->port_clock == hdmi_aud_ncts_30bpp[i].clock) {
> +				return hdmi_aud_ncts_30bpp[i].n;
> +			}
> +		}
> +	} else {
> +		for (i = 0; i < ARRAY_SIZE(hdmi_aud_ncts); i++) {
> +			if (rate == hdmi_aud_ncts[i].sample_rate &&
> +			    crtc_state->port_clock == hdmi_aud_ncts[i].clock) {
> +				return hdmi_aud_ncts[i].n;
> +			}

Please only use one for loop for this. There are at least three ways to
do this without duplication.

BR,
Jani.


>  		}
>  	}
> +
>  	return 0;
>  }

-- 
Jani Nikula, Intel Open Source Graphics Center
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  reply	other threads:[~2019-04-01 10:17 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-31  9:42 [PATCH 1/2] drm/i915/icl: Fix for setting HDMI 10/12 bit Deep color correctly Aditya Swarup
2019-03-31  9:42 ` [PATCH 2/2] drm/i915: Add N & CTS values for 10/12 bit deep color Aditya Swarup
2019-04-01 10:19   ` Jani Nikula [this message]
2019-03-31 10:19 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/icl: Fix for setting HDMI 10/12 bit Deep color correctly Patchwork
2019-03-31 10:48 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-31 12:55 ` ✓ Fi.CI.IGT: " Patchwork
2019-04-01 10:15 ` [PATCH 1/2] " Jani Nikula
  -- strict thread matches above, loose matches on Subject: below --
2019-06-27 21:44 [PATCH 0/2] Set correct values for N in deep color mode Aditya Swarup
2019-06-27 21:44 ` [PATCH 2/2] drm/i915: Add N & CTS values for 10/12 bit deep color Aditya Swarup

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