From: Jani Nikula <jani.nikula@intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org, shuang.he@linux.intel.com
Subject: Re: [PATCH 3/2] drm/i915: unify remaining register save/restore code a bit
Date: Thu, 13 Nov 2014 09:19:49 +0200 [thread overview]
Message-ID: <878ujfy3ca.fsf@intel.com> (raw)
In-Reply-To: <20141112154814.GA25711@phenom.ffwll.local>
On Wed, 12 Nov 2014, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Wed, Nov 12, 2014 at 05:01:10PM +0200, Jani Nikula wrote:
>> Use the same conditions, group by features, add comments.
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_suspend.c | 18 +++++++++---------
>> 1 file changed, 9 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
>> index 3c1fccfacac1..dfe661743398 100644
>> --- a/drivers/gpu/drm/i915/i915_suspend.c
>> +++ b/drivers/gpu/drm/i915/i915_suspend.c
>> @@ -203,21 +203,19 @@ static void i915_save_display(struct drm_device *dev)
>> i915_save_display_reg(dev);
>>
>> /* LVDS state */
>> - if (HAS_PCH_SPLIT(dev)) {
>> - dev_priv->regfile.savePP_CONTROL = I915_READ(PCH_PP_CONTROL);
>> - if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
>> - dev_priv->regfile.saveLVDS = I915_READ(PCH_LVDS);
>> - } else if (!IS_VALLEYVIEW(dev)) {
>> - dev_priv->regfile.savePP_CONTROL = I915_READ(PP_CONTROL);
>> - if (IS_MOBILE(dev) && !IS_I830(dev))
>> - dev_priv->regfile.saveLVDS = I915_READ(LVDS);
>> - }
>> + if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
>> + dev_priv->regfile.saveLVDS = I915_READ(PCH_LVDS);
>> + else if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
>> + dev_priv->regfile.saveLVDS = I915_READ(LVDS);
>>
>> + /* Panel power sequencer */
>> if (HAS_PCH_SPLIT(dev)) {
>> + dev_priv->regfile.savePP_CONTROL = I915_READ(PCH_PP_CONTROL);
>> dev_priv->regfile.savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS);
>> dev_priv->regfile.savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS);
>> dev_priv->regfile.savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR);
>> } else if (!IS_VALLEYVIEW(dev)) {
>> + dev_priv->regfile.savePP_CONTROL = I915_READ(PP_CONTROL);
>> dev_priv->regfile.savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS);
>> dev_priv->regfile.savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);
>> dev_priv->regfile.savePP_DIVISOR = I915_READ(PP_DIVISOR);
>
> Just because they're in the context: Do we still need to restore the PP
> stuff with all the recent pps patches? Would be great to remove this ...
AFAICT we only do the full setup for vlv/chv at eDP mode set, and that's
because the pipe might have changed. Something similar might cut it for
lvds and non-vlv/chv eDP, but I'm not prepared to touch that just yet
after Ville's changes. I'd rather the dust settled a bit first. ;)
The lvds setup similarly seems to carry over bits all the way from boot
over suspend/resume cycles.
BR,
Jani.
>
> Anyway looks all good (and nicely frigthening ;-) so pulled all into dinq.
> -Daniel
>
>> @@ -246,11 +244,13 @@ static void i915_restore_display(struct drm_device *dev)
>> if (drm_core_check_feature(dev, DRIVER_MODESET))
>> mask = ~LVDS_PORT_EN;
>>
>> + /* LVDS state */
>> if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
>> I915_WRITE(PCH_LVDS, dev_priv->regfile.saveLVDS & mask);
>> else if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
>> I915_WRITE(LVDS, dev_priv->regfile.saveLVDS & mask);
>>
>> + /* Panel power sequencer */
>> if (HAS_PCH_SPLIT(dev)) {
>> I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->regfile.savePP_ON_DELAYS);
>> I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->regfile.savePP_OFF_DELAYS);
>> --
>> 2.1.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2014-11-13 7:19 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-12 14:25 [PATCH 1/2] drm/i915: don't save/restore panel fitter registers Jani Nikula
2014-11-12 14:25 ` [PATCH 2/2] drm/i915: don't save/restore backlight hist ctl registers Jani Nikula
2014-11-12 15:01 ` [PATCH 3/2] drm/i915: unify remaining register save/restore code a bit Jani Nikula
2014-11-12 15:48 ` Daniel Vetter
2014-11-13 7:19 ` Jani Nikula [this message]
2014-11-13 20:29 ` Daniel Vetter
2014-11-13 0:56 ` [PATCH 2/2] drm/i915: don't save/restore backlight hist shuang.he
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