From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH] drm/i915: Fix PSR programming Date: Wed, 05 Mar 2014 11:31:27 +0200 Message-ID: <878usp3sb4.fsf@intel.com> References: <1394001490-18235-1-git-send-email-benjamin.widawsky@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 90A19FA41B for ; Wed, 5 Mar 2014 01:31:39 -0800 (PST) In-Reply-To: <1394001490-18235-1-git-send-email-benjamin.widawsky@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Intel GFX Cc: Ben Widawsky , Art Runyan , Kenneth Graunke , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org On Wed, 05 Mar 2014, Ben Widawsky wrote: > | has a higher precedence than ?. Therefore, the calculation doesn't do > at all what you would expect. Thanks to Ken for convincing me that this > was indeed the issue. Send me back to C programmer school, please. > > I'm sort of surprised PSR was continuing to work for people. It should > be broken IMO (and it was broken for me, but I had assumed it never > worked). > > Regression from: > commit ed8546ac1f99b850879f07b1e9b06b42fb0a36d9 > Author: Ben Widawsky > Date: Mon Nov 4 22:45:05 2013 -0800 > > drm/i915/bdw: Support eDP PSR > > I am pretty certain PSR is disabled by default, so no CC stable. I think I'll pick this up for -fixes, with CC stable, as it also breaks Haswell PSR. Reviewed-by: Jani Nikula > Cc: Rodrigo Vivi > Cc: Kenneth Graunke > Cc: Art Runyan > Reported-by: "Kumar, Kiran S" > Signed-off-by: Ben Widawsky > --- > drivers/gpu/drm/i915/intel_dp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index c512d78..2c0ceb4 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1723,7 +1723,7 @@ static void intel_edp_psr_enable_source(struct intel_dp *intel_dp) > val |= EDP_PSR_LINK_DISABLE; > > I915_WRITE(EDP_PSR_CTL(dev), val | > - IS_BROADWELL(dev) ? 0 : link_entry_time | > + (IS_BROADWELL(dev) ? 0 : link_entry_time) | > max_sleep_time << EDP_PSR_MAX_SLEEP_TIME_SHIFT | > idle_frames << EDP_PSR_IDLE_FRAME_SHIFT | > EDP_PSR_ENABLE); > -- > 1.9.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center