From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jani Nikula <jani.nikula@intel.com>
Subject: Re: [v2 1/2] drm/i915: Update VBT data structures to
	have MIPI block enhancements
Date: Thu, 27 Feb 2014 16:48:11 +0200
Message-ID: <878usw7gt0.fsf@intel.com>
References: <1392895001-26055-1-git-send-email-shobhit.kumar@intel.com>
	<1392895001-26055-2-git-send-email-shobhit.kumar@intel.com>
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To: Shobhit Kumar <shobhit.kumar@intel.com>, intel-gfx <intel-gfx@lists.freedesktop.org>
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On Thu, 20 Feb 2014, Shobhit Kumar <shobhit.kumar@intel.com> wrote:
> +/* Block 52 contains MIPI configuration block
> + * 6 * bdb_mipi_config, followed by 6 pps data
> + * block below
> + *
> + * all delays in ms

The spec you sent me has "... delay in 100us unit" for MIPI PPS entries
which is weird and which is the reason I asked you to document the
units. Please check.

With that checked,

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


-- 
Jani Nikula, Intel Open Source Technology Center