From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0DBFCC433EF for ; Tue, 7 Dec 2021 01:30:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 738AB73BEE; Tue, 7 Dec 2021 01:30:46 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3F7A973BEE for ; Tue, 7 Dec 2021 01:30:45 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10190"; a="298248807" X-IronPort-AV: E=Sophos;i="5.87,293,1631602800"; d="scan'208";a="298248807" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Dec 2021 17:30:44 -0800 X-IronPort-AV: E=Sophos;i="5.87,293,1631602800"; d="scan'208";a="579586798" Received: from adixit-mobl1.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.212.148.64]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Dec 2021 17:30:44 -0800 Date: Mon, 06 Dec 2021 17:30:43 -0800 Message-ID: <87a6hd19rw.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Umesh Nerlige Ramappa In-Reply-To: <20211207004542.24298-1-umesh.nerlige.ramappa@intel.com> References: <20211207004542.24298-1-umesh.nerlige.ramappa@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH] drm/i915/pmu: Fix wakeref leak in PMU busyness during reset X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, 06 Dec 2021 16:45:42 -0800, Umesh Nerlige Ramappa wrote: > > GuC PMU busyness gets gt wakeref if awake, but fails to release the > wakeref if a reset is in progress. Release the wakeref if it was > acquried successfully. > > Signed-off-by: Umesh Nerlige Ramappa > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > index 1f9d4fde421f..a243304a2db1 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > @@ -1181,6 +1181,7 @@ static ktime_t guc_engine_busyness(struct intel_engine_cs *engine, ktime_t *now) > struct intel_gt *gt = engine->gt; > struct intel_guc *guc = >->uc.guc; > u64 total, gt_stamp_saved; > + intel_wakeref_t wakeref; Should be bool. > unsigned long flags; > u32 reset_count; > bool in_reset; > @@ -1206,18 +1207,21 @@ static ktime_t guc_engine_busyness(struct intel_engine_cs *engine, ktime_t *now) > * start_gt_clk is derived from GuC state. To get a consistent > * view of activity, we query the GuC state only if gt is awake. > */ > - if (intel_gt_pm_get_if_awake(gt) && !in_reset) { Also how about just switch them around: if (!in_reset && intel_gt_pm_get_if_awake(gt)) Then you don't need any other changes I think. > + wakeref = intel_gt_pm_get_if_awake(gt); > + if (wakeref && !in_reset) { > stats_saved = *stats; > gt_stamp_saved = guc->timestamp.gt_stamp; > guc_update_engine_gt_clks(engine); > guc_update_pm_timestamp(guc, engine, now); > - intel_gt_pm_put_async(gt); > if (i915_reset_count(gpu_error) != reset_count) { > *stats = stats_saved; > guc->timestamp.gt_stamp = gt_stamp_saved; > } > } > > + if (wakeref) > + intel_gt_pm_put_async(gt); > + > total = intel_gt_clock_interval_to_ns(gt, stats->total_gt_clks); > if (stats->running) { > u64 clk = guc->timestamp.gt_stamp - stats->start_gt_clk; > -- > 2.20.1 >