From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2278C10DCE for ; Thu, 12 Mar 2020 16:28:52 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7E79B206F1 for ; Thu, 12 Mar 2020 16:28:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7E79B206F1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E08F56EAFF; Thu, 12 Mar 2020 16:28:51 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7CBDC6EAFF for ; Thu, 12 Mar 2020 16:28:50 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Mar 2020 09:28:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,545,1574150400"; d="scan'208";a="261568415" Received: from gaia.fi.intel.com ([10.237.72.192]) by orsmga002.jf.intel.com with ESMTP; 12 Mar 2020 09:28:47 -0700 Received: by gaia.fi.intel.com (Postfix, from userid 1000) id E33EC5C1DD1; Thu, 12 Mar 2020 18:27:24 +0200 (EET) From: Mika Kuoppala To: Matt Roper , intel-gfx@lists.freedesktop.org In-Reply-To: <20200311162300.1838847-6-matthew.d.roper@intel.com> References: <20200311162300.1838847-1-matthew.d.roper@intel.com> <20200311162300.1838847-6-matthew.d.roper@intel.com> Date: Thu, 12 Mar 2020 18:27:24 +0200 Message-ID: <87a74l1qtv.fsf@gaia.fi.intel.com> MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH v2 5/6] drm/i915: Apply Wa_1406680159:icl, ehl as an engine workaround X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Matt Roper writes: > The register this workaround updates is a render engine register in the > MCR range, so we should initialize this in rcs_engine_wa_init() rather > than gt_wa_init(). > > Closes: https://gitlab.freedesktop.org/drm/intel/issues/1222 > Fixes: 36204d80bacb ("drm/i915/icl: Wa_1406680159") > Cc: Mika Kuoppala > Signed-off-by: Matt Roper At some sunny day mcr range verification might appear. Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 2318b55b9722..cbfc8d5ebb3e 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -920,11 +920,6 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) > SLICE_UNIT_LEVEL_CLKGATE, > MSCUNIT_CLKGATE_DIS); > > - /* Wa_1406680159:icl */ > - wa_write_or(wal, > - SUBSLICE_UNIT_LEVEL_CLKGATE, > - GWUNIT_CLKGATE_DIS); > - > /* Wa_1406838659:icl (pre-prod) */ > if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_B0)) > wa_write_or(wal, > @@ -1487,6 +1482,11 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) > /* Wa_1407352427:icl,ehl */ > wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2, > PSDUNIT_CLKGATE_DIS); > + > + /* Wa_1406680159:icl,ehl */ > + wa_write_or(wal, > + SUBSLICE_UNIT_LEVEL_CLKGATE, > + GWUNIT_CLKGATE_DIS); > } > > if (IS_GEN_RANGE(i915, 9, 12)) { > -- > 2.24.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx