From: Jani Nikula <jani.nikula@intel.com>
To: Madhav Chauhan <madhav.chauhan@intel.com>,
intel-gfx@lists.freedesktop.org
Cc: ander.conselvan.de.oliveira@intel.com,
Vincente Tsou <vincente.tsou@intel.com>,
shobhit.kumar@intel.com
Subject: Re: [PATCH] drm/915: Parsing the missed out DTD fields from the VBT
Date: Fri, 23 Dec 2016 15:16:45 +0200 [thread overview]
Message-ID: <87bmw2lr9e.fsf@intel.com> (raw)
In-Reply-To: <1482430993-3265-1-git-send-email-madhav.chauhan@intel.com>
On Thu, 22 Dec 2016, Madhav Chauhan <madhav.chauhan@intel.com> wrote:
> From: Vincente Tsou <vincente.tsou@intel.com>
>
> The upper bits of the vsync width, vsync offset and hsync width
> were not parsed from the VBT. Parse these fields in this patch.
>
> V2: Renamed lvds dvo timing structure members and code identation
> fix (Jani's review comments)
> V3: Corrected commit message, used "from the VBT"
>
> Signed-off-by: Vincente Tsou <vincente.tsou@intel.com>
> Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Pushed to dinq, thanks for the patch.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/intel_bios.c | 8 +++++---
> drivers/gpu/drm/i915/intel_vbt_defs.h | 12 +++++++-----
> 2 files changed, 12 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index a359def..f6d3755 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -114,16 +114,18 @@ static u32 get_blocksize(const void *block_data)
> panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
> ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
> panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
> - dvo_timing->hsync_pulse_width;
> + ((dvo_timing->hsync_pulse_width_hi << 8) |
> + dvo_timing->hsync_pulse_width_lo);
> panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
> ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
>
> panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
> dvo_timing->vactive_lo;
> panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
> - dvo_timing->vsync_off;
> + ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
> panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
> - dvo_timing->vsync_pulse_width;
> + ((dvo_timing->vsync_pulse_width_hi << 4) |
> + dvo_timing->vsync_pulse_width_lo);
> panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
> ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
> panel_fixed_mode->clock = dvo_timing->clock * 10;
> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
> index 8886cab1..a92e776 100644
> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> @@ -399,10 +399,12 @@ struct lvds_dvo_timing {
> u8 vblank_hi:4;
> u8 vactive_hi:4;
> u8 hsync_off_lo;
> - u8 hsync_pulse_width;
> - u8 vsync_pulse_width:4;
> - u8 vsync_off:4;
> - u8 rsvd0:6;
> + u8 hsync_pulse_width_lo;
> + u8 vsync_pulse_width_lo:4;
> + u8 vsync_off_lo:4;
> + u8 vsync_pulse_width_hi:2;
> + u8 vsync_off_hi:2;
> + u8 hsync_pulse_width_hi:2;
> u8 hsync_off_hi:2;
> u8 himage_lo;
> u8 vimage_lo;
> @@ -414,7 +416,7 @@ struct lvds_dvo_timing {
> u8 digital:2;
> u8 vsync_positive:1;
> u8 hsync_positive:1;
> - u8 rsvd2:1;
> + u8 non_interlaced:1;
> } __packed;
>
> struct lvds_pnp_id {
--
Jani Nikula, Intel Open Source Technology Center
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next prev parent reply other threads:[~2016-12-23 13:16 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-22 18:23 [PATCH] drm/915: Parsing the missed out DTD fields from the VBT Madhav Chauhan
2016-12-22 21:23 ` ✓ Fi.CI.BAT: success for drm/915: Parsing the missed out DTD fields from the VBT (rev2) Patchwork
2016-12-23 13:16 ` Jani Nikula [this message]
-- strict thread matches above, loose matches on Subject: below --
2016-12-22 18:07 [PATCH] drm/915: Parsing the missed out DTD fields from the VBT Madhav Chauhan
2016-12-22 18:29 ` Ville Syrjälä
2016-12-23 7:03 ` Jani Nikula
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