From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Dhinakaran Pandiyan <dhnkrn@gmail.com>,
Harry Wentland <harry.wentland@amd.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: Re: [PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
Date: Mon, 30 Oct 2017 17:32:51 +0200 [thread overview]
Message-ID: <87efpkfy70.fsf@intel.com> (raw)
In-Reply-To: <20171027113722.GA10981@intel.com>
On Fri, 27 Oct 2017, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, Oct 27, 2017 at 01:25:01PM +0300, Jani Nikula wrote:
>> On Mon, 14 Aug 2017, Harry Wentland <harry.wentland@amd.com> wrote:
>> > On 2017-08-11 02:10 PM, Dhinakaran Pandiyan wrote:
>> >> DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state
>> >>
>> >> 101 = Set Main-Link for local Sink device and all downstream Sink
>> >> devices to D3 (power-down mode), keep AUX block fully powered, ready to
>> >> reply within a Response Timeout period of 300us.
>> >>
>> >> This state is useful in a MST dock + MST monitor configuration that
>> >> doesn't wake up from D3 state.
>> >>
>> >> v2: Use spaces instead of tabs (Jani)
>> >>
>> >> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
>> >
>> > Reviewed-by: Harry Wentland <harry.wentland@amd.com>
>>
>> Pushed this one to drm-misc-next, thanks for the patch and review, and
>> sorry for the delay.
>
> Sorry to start reviewing after this got pushed, but...
>
>>
>> BR,
>> Jani.
>>
>> >
>> > Harry
>> >
>> >> ---
>> >> include/drm/drm_dp_helper.h | 1 +
>> >> 1 file changed, 1 insertion(+)
>> >>
>> >> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>> >> index b17476a..47a6cdb 100644
>> >> --- a/include/drm/drm_dp_helper.h
>> >> +++ b/include/drm/drm_dp_helper.h
>> >> @@ -618,6 +618,7 @@
>> >> # define DP_SET_POWER_D0 0x1
>> >> # define DP_SET_POWER_D3 0x2
>> >> # define DP_SET_POWER_MASK 0x3
>
> This mask doesn't cover the "aux" bit. I guess it's a purely theoretical
> concern at this point since the device should start out in D0 when
> first plugged in.
>
> Also IIRC this stuff was added in DPCD 1.2. We might want a comment to
> reflect that fact.
Okay, the damage is done, someone(tm) please send fixup patches on top
to make it right.
BR,
Jani.
>
>> >> +# define DP_SET_POWER_D3_AUX_ON 0x5
>> >>
>> >> #define DP_EDP_DPCD_REV 0x700 /* eDP 1.2 */
>> >> # define DP_EDP_11 0x00
>> >>
>> > _______________________________________________
>> > Intel-gfx mailing list
>> > Intel-gfx@lists.freedesktop.org
>> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>
>> --
>> Jani Nikula, Intel Open Source Technology Center
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-10-30 15:32 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-11 1:16 [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Dhinakaran Pandiyan
2017-08-11 1:16 ` [PATCH 2/2] drm/i915/dp: Leave the AUX block powered on for MST Dhinakaran Pandiyan
2017-08-14 18:00 ` Lyude Paul
2017-08-11 5:40 ` [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Jani Nikula
2017-08-11 18:10 ` [PATCH v2 " Dhinakaran Pandiyan
2017-08-14 18:06 ` Harry Wentland
2017-10-27 10:25 ` [Intel-gfx] " Jani Nikula
2017-10-27 11:37 ` Ville Syrjälä
2017-10-30 15:32 ` Jani Nikula [this message]
2017-08-11 9:55 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2017-08-11 18:33 ` ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered (rev2) Patchwork
2017-10-26 7:59 ` [Intel-gfx] [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Jani Nikula
2017-10-26 17:47 ` Pandiyan, Dhinakaran
2017-10-27 7:40 ` Jani Nikula
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