* [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format
2016-12-30 5:25 [PATCH 00/10] enable psr2 for idle_screen on y-cordinate panel vathsala nagaraju
@ 2016-12-30 5:25 ` vathsala nagaraju
2016-12-30 19:05 ` Daniel Vetter
0 siblings, 1 reply; 7+ messages in thread
From: vathsala nagaraju @ 2016-12-30 5:25 UTC (permalink / raw)
To: intel-gfx; +Cc: Patil Deepti, Rodrigo Vivi
PSR2 vsc revision number hb2( as per table 6-11)is updated to
4 or 5 based on Y cordinate and Colorimetry Format as below
04h = 3D stereo + PSR/PSR2 + Y-coordinate.
05h = -3D stereo- + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry
Format indication. A DP Source device is allowed to indicate the pixel
encoding/colorimetry format to the DP Sink device with VSC SDP only when
the DP Sink device supports it (
i.e.,VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the
DPRX_FEATURE_ENUMERATION_LIST register (DPCD Address 02210h, bit 3;
is set to 1).
v2: (Jani)
- Change DP_PSR_Y_COORDINATE to DP_PSR2_SU_Y_COORDINATE_REQUIRED.
- Add DP_PSR2_SU_GRANULARITY_REQUIRED.
- Change DPRX_FEATURE_ENUMERATION_LIST to DP_DPRX.
- Add GTC_CAP and AV_SYNC_CAP, other bits in DPRX_FEATURE_ENUMERATION_LIST.
v3: (Jani)
- Add support for bits 7:4 and 1 as per DP v1.4 for
DPRX_FEATURE_ENUMERATION_LIST.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
Signed-off-by: Patil Deepti <deepti.patil@intel.com>
---
include/drm/drm_dp_helper.h | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 55bbeb0..0468135 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -194,7 +194,8 @@
# define DP_PSR_SETUP_TIME_0 (6 << 1)
# define DP_PSR_SETUP_TIME_MASK (7 << 1)
# define DP_PSR_SETUP_TIME_SHIFT 1
-
+# define DP_PSR2_SU_Y_COORDINATE_REQUIRED (1 << 4) /* eDP 1.4a */
+# define DP_PSR2_SU_GRANULARITY_REQUIRED (1 << 5) /* eDP 1.4b */
/*
* 0x80-0x8f describe downstream port capabilities, but there are two layouts
* based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set. If it was not,
@@ -568,6 +569,16 @@
#define DP_RECEIVER_ALPM_STATUS 0x200b /* eDP 1.4 */
# define DP_ALPM_LOCK_TIMEOUT_ERROR (1 << 0)
+#define DP_DPRX_FEATURE_ENUMERATION_LIST 0x2210 /* DP 1.3 */
+# define DP_GTC_CAP (1 << 0) /* DP 1.3 */
+# define DP_SST_SPLIT_SDP_CAP (1 << 1) /* DP 1.4 */
+# define DP_AV_SYNC_CAP (1 << 2) /* DP 1.3 */
+# define DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED (1 << 3) /* DP 1.3 */
+# define DP_VSC_EXT_VESA_SDP_SUPPORTED (1 << 4) /* DP 1.4 */
+# define DP_VSC_EXT_VESA_SDP_CHAINING_SUPPORTED (1 << 5) /* DP 1.4 */
+# define DP_VSC_EXT_CEA_SDP_SUPPORTED (1 << 6) /* DP 1.4 */
+# define DP_VSC_EXT_CEA_SDP_CHAINING_SUPPORTED (1 << 7) /* DP 1.4 */
+
/* DP 1.2 Sideband message defines */
/* peer device type - DP 1.2a Table 2-92 */
#define DP_PEER_DEVICE_NONE 0x0
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format
2016-12-30 5:25 ` [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format vathsala nagaraju
@ 2016-12-30 19:05 ` Daniel Vetter
0 siblings, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2016-12-30 19:05 UTC (permalink / raw)
To: vathsala nagaraju; +Cc: intel-gfx, Patil Deepti, Rodrigo Vivi
On Fri, Dec 30, 2016 at 10:55:15AM +0530, vathsala nagaraju wrote:
> PSR2 vsc revision number hb2( as per table 6-11)is updated to
> 4 or 5 based on Y cordinate and Colorimetry Format as below
> 04h = 3D stereo + PSR/PSR2 + Y-coordinate.
> 05h = -3D stereo- + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry
> Format indication. A DP Source device is allowed to indicate the pixel
> encoding/colorimetry format to the DP Sink device with VSC SDP only when
> the DP Sink device supports it (
> i.e.,VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the
> DPRX_FEATURE_ENUMERATION_LIST register (DPCD Address 02210h, bit 3;
> is set to 1).
>
> v2: (Jani)
> - Change DP_PSR_Y_COORDINATE to DP_PSR2_SU_Y_COORDINATE_REQUIRED.
> - Add DP_PSR2_SU_GRANULARITY_REQUIRED.
> - Change DPRX_FEATURE_ENUMERATION_LIST to DP_DPRX.
> - Add GTC_CAP and AV_SYNC_CAP, other bits in DPRX_FEATURE_ENUMERATION_LIST.
>
> v3: (Jani)
> - Add support for bits 7:4 and 1 as per DP v1.4 for
> DPRX_FEATURE_ENUMERATION_LIST.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Jim Bride <jim.bride@linux.intel.com>
> Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
> Signed-off-by: Patil Deepti <deepti.patil@intel.com>
drm core patches always need to be submitted to dri-devel. In general just
submit a patch series to both mailing lists if that's the case, so that
dri-devel has the full context.
-Daniel
> ---
> include/drm/drm_dp_helper.h | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 55bbeb0..0468135 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -194,7 +194,8 @@
> # define DP_PSR_SETUP_TIME_0 (6 << 1)
> # define DP_PSR_SETUP_TIME_MASK (7 << 1)
> # define DP_PSR_SETUP_TIME_SHIFT 1
> -
> +# define DP_PSR2_SU_Y_COORDINATE_REQUIRED (1 << 4) /* eDP 1.4a */
> +# define DP_PSR2_SU_GRANULARITY_REQUIRED (1 << 5) /* eDP 1.4b */
> /*
> * 0x80-0x8f describe downstream port capabilities, but there are two layouts
> * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set. If it was not,
> @@ -568,6 +569,16 @@
> #define DP_RECEIVER_ALPM_STATUS 0x200b /* eDP 1.4 */
> # define DP_ALPM_LOCK_TIMEOUT_ERROR (1 << 0)
>
> +#define DP_DPRX_FEATURE_ENUMERATION_LIST 0x2210 /* DP 1.3 */
> +# define DP_GTC_CAP (1 << 0) /* DP 1.3 */
> +# define DP_SST_SPLIT_SDP_CAP (1 << 1) /* DP 1.4 */
> +# define DP_AV_SYNC_CAP (1 << 2) /* DP 1.3 */
> +# define DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED (1 << 3) /* DP 1.3 */
> +# define DP_VSC_EXT_VESA_SDP_SUPPORTED (1 << 4) /* DP 1.4 */
> +# define DP_VSC_EXT_VESA_SDP_CHAINING_SUPPORTED (1 << 5) /* DP 1.4 */
> +# define DP_VSC_EXT_CEA_SDP_SUPPORTED (1 << 6) /* DP 1.4 */
> +# define DP_VSC_EXT_CEA_SDP_CHAINING_SUPPORTED (1 << 7) /* DP 1.4 */
> +
> /* DP 1.2 Sideband message defines */
> /* peer device type - DP 1.2a Table 2-92 */
> #define DP_PEER_DEVICE_NONE 0x0
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format
@ 2016-12-31 2:18 vathsala nagaraju
2017-01-02 8:18 ` Daniel Vetter
2017-01-02 8:34 ` Jani Nikula
0 siblings, 2 replies; 7+ messages in thread
From: vathsala nagaraju @ 2016-12-31 2:18 UTC (permalink / raw)
To: dri-devel, intel-gfx; +Cc: Patil Deepti, Rodrigo Vivi
PSR2 vsc revision number hb2( as per table 6-11)is updated to
4 or 5 based on Y cordinate and Colorimetry Format as below
04h = 3D stereo + PSR/PSR2 + Y-coordinate.
05h = -3D stereo- + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry
Format indication. A DP Source device is allowed to indicate the pixel
encoding/colorimetry format to the DP Sink device with VSC SDP only when
the DP Sink device supports it (
i.e.,VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the
DPRX_FEATURE_ENUMERATION_LIST register (DPCD Address 02210h, bit 3;
is set to 1).
v2: (Jani)
- Change DP_PSR_Y_COORDINATE to DP_PSR2_SU_Y_COORDINATE_REQUIRED.
- Add DP_PSR2_SU_GRANULARITY_REQUIRED.
- Change DPRX_FEATURE_ENUMERATION_LIST to DP_DPRX.
- Add GTC_CAP and AV_SYNC_CAP, other bits in DPRX_FEATURE_ENUMERATION_LIST.
v3: (Jani)
- Add support for bits 7:4 and 1 as per DP v1.4 for
DPRX_FEATURE_ENUMERATION_LIST.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
Signed-off-by: Patil Deepti <deepti.patil@intel.com>
---
include/drm/drm_dp_helper.h | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 55bbeb0..0468135 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -194,7 +194,8 @@
# define DP_PSR_SETUP_TIME_0 (6 << 1)
# define DP_PSR_SETUP_TIME_MASK (7 << 1)
# define DP_PSR_SETUP_TIME_SHIFT 1
-
+# define DP_PSR2_SU_Y_COORDINATE_REQUIRED (1 << 4) /* eDP 1.4a */
+# define DP_PSR2_SU_GRANULARITY_REQUIRED (1 << 5) /* eDP 1.4b */
/*
* 0x80-0x8f describe downstream port capabilities, but there are two layouts
* based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set. If it was not,
@@ -568,6 +569,16 @@
#define DP_RECEIVER_ALPM_STATUS 0x200b /* eDP 1.4 */
# define DP_ALPM_LOCK_TIMEOUT_ERROR (1 << 0)
+#define DP_DPRX_FEATURE_ENUMERATION_LIST 0x2210 /* DP 1.3 */
+# define DP_GTC_CAP (1 << 0) /* DP 1.3 */
+# define DP_SST_SPLIT_SDP_CAP (1 << 1) /* DP 1.4 */
+# define DP_AV_SYNC_CAP (1 << 2) /* DP 1.3 */
+# define DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED (1 << 3) /* DP 1.3 */
+# define DP_VSC_EXT_VESA_SDP_SUPPORTED (1 << 4) /* DP 1.4 */
+# define DP_VSC_EXT_VESA_SDP_CHAINING_SUPPORTED (1 << 5) /* DP 1.4 */
+# define DP_VSC_EXT_CEA_SDP_SUPPORTED (1 << 6) /* DP 1.4 */
+# define DP_VSC_EXT_CEA_SDP_CHAINING_SUPPORTED (1 << 7) /* DP 1.4 */
+
/* DP 1.2 Sideband message defines */
/* peer device type - DP 1.2a Table 2-92 */
#define DP_PEER_DEVICE_NONE 0x0
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format
2016-12-31 2:18 [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format vathsala nagaraju
@ 2017-01-02 8:18 ` Daniel Vetter
[not found] ` <DFCE9515A6E7D340BE366A94B943DE134F88144E@BGSMSX103.gar.corp.intel.com>
2017-01-02 8:34 ` Jani Nikula
1 sibling, 1 reply; 7+ messages in thread
From: Daniel Vetter @ 2017-01-02 8:18 UTC (permalink / raw)
To: vathsala nagaraju; +Cc: intel-gfx, Patil Deepti, dri-devel, Rodrigo Vivi
On Sat, Dec 31, 2016 at 07:48:38AM +0530, vathsala nagaraju wrote:
> PSR2 vsc revision number hb2( as per table 6-11)is updated to
> 4 or 5 based on Y cordinate and Colorimetry Format as below
> 04h = 3D stereo + PSR/PSR2 + Y-coordinate.
> 05h = -3D stereo- + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry
> Format indication. A DP Source device is allowed to indicate the pixel
> encoding/colorimetry format to the DP Sink device with VSC SDP only when
> the DP Sink device supports it (
> i.e.,VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the
> DPRX_FEATURE_ENUMERATION_LIST register (DPCD Address 02210h, bit 3;
> is set to 1).
>
> v2: (Jani)
> - Change DP_PSR_Y_COORDINATE to DP_PSR2_SU_Y_COORDINATE_REQUIRED.
> - Add DP_PSR2_SU_GRANULARITY_REQUIRED.
> - Change DPRX_FEATURE_ENUMERATION_LIST to DP_DPRX.
> - Add GTC_CAP and AV_SYNC_CAP, other bits in DPRX_FEATURE_ENUMERATION_LIST.
>
> v3: (Jani)
> - Add support for bits 7:4 and 1 as per DP v1.4 for
> DPRX_FEATURE_ENUMERATION_LIST.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Jim Bride <jim.bride@linux.intel.com>
> Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
> Signed-off-by: Patil Deepti <deepti.patil@intel.com>
Please cc the entire patch series to all mailing lists, so that people
have the full context.
Thanks, Daniel
> ---
> include/drm/drm_dp_helper.h | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 55bbeb0..0468135 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -194,7 +194,8 @@
> # define DP_PSR_SETUP_TIME_0 (6 << 1)
> # define DP_PSR_SETUP_TIME_MASK (7 << 1)
> # define DP_PSR_SETUP_TIME_SHIFT 1
> -
> +# define DP_PSR2_SU_Y_COORDINATE_REQUIRED (1 << 4) /* eDP 1.4a */
> +# define DP_PSR2_SU_GRANULARITY_REQUIRED (1 << 5) /* eDP 1.4b */
> /*
> * 0x80-0x8f describe downstream port capabilities, but there are two layouts
> * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set. If it was not,
> @@ -568,6 +569,16 @@
> #define DP_RECEIVER_ALPM_STATUS 0x200b /* eDP 1.4 */
> # define DP_ALPM_LOCK_TIMEOUT_ERROR (1 << 0)
>
> +#define DP_DPRX_FEATURE_ENUMERATION_LIST 0x2210 /* DP 1.3 */
> +# define DP_GTC_CAP (1 << 0) /* DP 1.3 */
> +# define DP_SST_SPLIT_SDP_CAP (1 << 1) /* DP 1.4 */
> +# define DP_AV_SYNC_CAP (1 << 2) /* DP 1.3 */
> +# define DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED (1 << 3) /* DP 1.3 */
> +# define DP_VSC_EXT_VESA_SDP_SUPPORTED (1 << 4) /* DP 1.4 */
> +# define DP_VSC_EXT_VESA_SDP_CHAINING_SUPPORTED (1 << 5) /* DP 1.4 */
> +# define DP_VSC_EXT_CEA_SDP_SUPPORTED (1 << 6) /* DP 1.4 */
> +# define DP_VSC_EXT_CEA_SDP_CHAINING_SUPPORTED (1 << 7) /* DP 1.4 */
> +
> /* DP 1.2 Sideband message defines */
> /* peer device type - DP 1.2a Table 2-92 */
> #define DP_PEER_DEVICE_NONE 0x0
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format
2016-12-31 2:18 [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format vathsala nagaraju
2017-01-02 8:18 ` Daniel Vetter
@ 2017-01-02 8:34 ` Jani Nikula
1 sibling, 0 replies; 7+ messages in thread
From: Jani Nikula @ 2017-01-02 8:34 UTC (permalink / raw)
To: vathsala nagaraju, dri-devel, intel-gfx; +Cc: Patil Deepti, Rodrigo Vivi
On Sat, 31 Dec 2016, vathsala nagaraju <vathsala.nagaraju@intel.com> wrote:
> PSR2 vsc revision number hb2( as per table 6-11)is updated to
> 4 or 5 based on Y cordinate and Colorimetry Format as below
> 04h = 3D stereo + PSR/PSR2 + Y-coordinate.
> 05h = -3D stereo- + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry
> Format indication. A DP Source device is allowed to indicate the pixel
> encoding/colorimetry format to the DP Sink device with VSC SDP only when
> the DP Sink device supports it (
> i.e.,VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the
> DPRX_FEATURE_ENUMERATION_LIST register (DPCD Address 02210h, bit 3;
> is set to 1).
>
> v2: (Jani)
> - Change DP_PSR_Y_COORDINATE to DP_PSR2_SU_Y_COORDINATE_REQUIRED.
> - Add DP_PSR2_SU_GRANULARITY_REQUIRED.
> - Change DPRX_FEATURE_ENUMERATION_LIST to DP_DPRX.
> - Add GTC_CAP and AV_SYNC_CAP, other bits in DPRX_FEATURE_ENUMERATION_LIST.
>
> v3: (Jani)
> - Add support for bits 7:4 and 1 as per DP v1.4 for
> DPRX_FEATURE_ENUMERATION_LIST.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Jim Bride <jim.bride@linux.intel.com>
> Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
> Signed-off-by: Patil Deepti <deepti.patil@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> include/drm/drm_dp_helper.h | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 55bbeb0..0468135 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -194,7 +194,8 @@
> # define DP_PSR_SETUP_TIME_0 (6 << 1)
> # define DP_PSR_SETUP_TIME_MASK (7 << 1)
> # define DP_PSR_SETUP_TIME_SHIFT 1
> -
> +# define DP_PSR2_SU_Y_COORDINATE_REQUIRED (1 << 4) /* eDP 1.4a */
> +# define DP_PSR2_SU_GRANULARITY_REQUIRED (1 << 5) /* eDP 1.4b */
> /*
> * 0x80-0x8f describe downstream port capabilities, but there are two layouts
> * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set. If it was not,
> @@ -568,6 +569,16 @@
> #define DP_RECEIVER_ALPM_STATUS 0x200b /* eDP 1.4 */
> # define DP_ALPM_LOCK_TIMEOUT_ERROR (1 << 0)
>
> +#define DP_DPRX_FEATURE_ENUMERATION_LIST 0x2210 /* DP 1.3 */
> +# define DP_GTC_CAP (1 << 0) /* DP 1.3 */
> +# define DP_SST_SPLIT_SDP_CAP (1 << 1) /* DP 1.4 */
> +# define DP_AV_SYNC_CAP (1 << 2) /* DP 1.3 */
> +# define DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED (1 << 3) /* DP 1.3 */
> +# define DP_VSC_EXT_VESA_SDP_SUPPORTED (1 << 4) /* DP 1.4 */
> +# define DP_VSC_EXT_VESA_SDP_CHAINING_SUPPORTED (1 << 5) /* DP 1.4 */
> +# define DP_VSC_EXT_CEA_SDP_SUPPORTED (1 << 6) /* DP 1.4 */
> +# define DP_VSC_EXT_CEA_SDP_CHAINING_SUPPORTED (1 << 7) /* DP 1.4 */
> +
> /* DP 1.2 Sideband message defines */
> /* peer device type - DP 1.2a Table 2-92 */
> #define DP_PEER_DEVICE_NONE 0x0
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format
[not found] ` <DFCE9515A6E7D340BE366A94B943DE134F88144E@BGSMSX103.gar.corp.intel.com>
@ 2017-01-02 9:17 ` Daniel Vetter
0 siblings, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2017-01-02 9:17 UTC (permalink / raw)
To: Nagaraju, Vathsala, intel-gfx
On Mon, Jan 2, 2017 at 9:43 AM, Nagaraju, Vathsala
<vathsala.nagaraju@intel.com> wrote:
> Hi Daniel,
>
> In the series ,this is the only patch which has changes in drm/drm_dp_helper.h, and just now, Jani put the reviewed-tag.
> Should I post the series to dri-devel@lists.freedesktop.org ? please advise.
Yes. Context matters (and Jani can see the context since he's on
intel-gfx, but not everyone on dri-devel is on both lists).
-Daniel
> Regards,
> Vathsala
>
> -----Original Message-----
> From: Daniel Vetter [mailto:daniel.vetter@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Monday, January 2, 2017 1:49 PM
> To: Nagaraju, Vathsala <vathsala.nagaraju@intel.com>
> Cc: dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; Patil, Deepti <deepti.patil@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> Subject: Re: [Intel-gfx] [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format
>
> On Sat, Dec 31, 2016 at 07:48:38AM +0530, vathsala nagaraju wrote:
>> PSR2 vsc revision number hb2( as per table 6-11)is updated to
>> 4 or 5 based on Y cordinate and Colorimetry Format as below 04h = 3D
>> stereo + PSR/PSR2 + Y-coordinate.
>> 05h = -3D stereo- + PSR/PSR2 + Y-coordinate + Pixel
>> Encoding/Colorimetry Format indication. A DP Source device is allowed
>> to indicate the pixel encoding/colorimetry format to the DP Sink
>> device with VSC SDP only when the DP Sink device supports it (
>> i.e.,VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the
>> DPRX_FEATURE_ENUMERATION_LIST register (DPCD Address 02210h, bit 3; is
>> set to 1).
>>
>> v2: (Jani)
>> - Change DP_PSR_Y_COORDINATE to DP_PSR2_SU_Y_COORDINATE_REQUIRED.
>> - Add DP_PSR2_SU_GRANULARITY_REQUIRED.
>> - Change DPRX_FEATURE_ENUMERATION_LIST to DP_DPRX.
>> - Add GTC_CAP and AV_SYNC_CAP, other bits in DPRX_FEATURE_ENUMERATION_LIST.
>>
>> v3: (Jani)
>> - Add support for bits 7:4 and 1 as per DP v1.4 for
>> DPRX_FEATURE_ENUMERATION_LIST.
>>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Jim Bride <jim.bride@linux.intel.com>
>> Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
>> Signed-off-by: Patil Deepti <deepti.patil@intel.com>
>
> Please cc the entire patch series to all mailing lists, so that people have the full context.
>
> Thanks, Daniel
>
>> ---
>> include/drm/drm_dp_helper.h | 13 ++++++++++++-
>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>> index 55bbeb0..0468135 100644
>> --- a/include/drm/drm_dp_helper.h
>> +++ b/include/drm/drm_dp_helper.h
>> @@ -194,7 +194,8 @@
>> # define DP_PSR_SETUP_TIME_0 (6 << 1)
>> # define DP_PSR_SETUP_TIME_MASK (7 << 1)
>> # define DP_PSR_SETUP_TIME_SHIFT 1
>> -
>> +# define DP_PSR2_SU_Y_COORDINATE_REQUIRED (1 << 4) /* eDP 1.4a */
>> +# define DP_PSR2_SU_GRANULARITY_REQUIRED (1 << 5) /* eDP 1.4b */
>> /*
>> * 0x80-0x8f describe downstream port capabilities, but there are two layouts
>> * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set. If it
>> was not, @@ -568,6 +569,16 @@
>> #define DP_RECEIVER_ALPM_STATUS 0x200b /* eDP 1.4 */
>> # define DP_ALPM_LOCK_TIMEOUT_ERROR (1 << 0)
>>
>> +#define DP_DPRX_FEATURE_ENUMERATION_LIST 0x2210 /* DP 1.3 */
>> +# define DP_GTC_CAP (1 << 0) /* DP 1.3 */
>> +# define DP_SST_SPLIT_SDP_CAP (1 << 1) /* DP 1.4 */
>> +# define DP_AV_SYNC_CAP (1 << 2) /* DP 1.3 */
>> +# define DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED (1 << 3) /* DP 1.3 */
>> +# define DP_VSC_EXT_VESA_SDP_SUPPORTED (1 << 4) /* DP 1.4 */
>> +# define DP_VSC_EXT_VESA_SDP_CHAINING_SUPPORTED (1 << 5) /* DP 1.4 */
>> +# define DP_VSC_EXT_CEA_SDP_SUPPORTED (1 << 6) /* DP 1.4 */
>> +# define DP_VSC_EXT_CEA_SDP_CHAINING_SUPPORTED (1 << 7) /* DP 1.4 */
>> +
>> /* DP 1.2 Sideband message defines */
>> /* peer device type - DP 1.2a Table 2-92 */
>> #define DP_PEER_DEVICE_NONE 0x0
>> --
>> 1.9.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format
2017-01-02 11:30 [PATCH 00/10] enable psr2 for idle_screen on y-cordinate panel vathsala nagaraju
@ 2017-01-02 11:30 ` vathsala nagaraju
0 siblings, 0 replies; 7+ messages in thread
From: vathsala nagaraju @ 2017-01-02 11:30 UTC (permalink / raw)
To: dri-devel, intel-gfx; +Cc: Patil Deepti, Rodrigo Vivi
PSR2 vsc revision number hb2( as per table 6-11)is updated to
4 or 5 based on Y cordinate and Colorimetry Format as below
04h = 3D stereo + PSR/PSR2 + Y-coordinate.
05h = -3D stereo- + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry
Format indication. A DP Source device is allowed to indicate the pixel
encoding/colorimetry format to the DP Sink device with VSC SDP only when
the DP Sink device supports it (
i.e.,VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the
DPRX_FEATURE_ENUMERATION_LIST register (DPCD Address 02210h, bit 3;
is set to 1).
v2: (Jani)
- Change DP_PSR_Y_COORDINATE to DP_PSR2_SU_Y_COORDINATE_REQUIRED.
- Add DP_PSR2_SU_GRANULARITY_REQUIRED.
- Change DPRX_FEATURE_ENUMERATION_LIST to DP_DPRX.
- Add GTC_CAP and AV_SYNC_CAP, other bits in DPRX_FEATURE_ENUMERATION_LIST.
v3: (Jani)
- Add support for bits 7:4 and 1 as per DP v1.4 for
DPRX_FEATURE_ENUMERATION_LIST.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
Signed-off-by: Patil Deepti <deepti.patil@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
include/drm/drm_dp_helper.h | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 55bbeb0..0468135 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -194,7 +194,8 @@
# define DP_PSR_SETUP_TIME_0 (6 << 1)
# define DP_PSR_SETUP_TIME_MASK (7 << 1)
# define DP_PSR_SETUP_TIME_SHIFT 1
-
+# define DP_PSR2_SU_Y_COORDINATE_REQUIRED (1 << 4) /* eDP 1.4a */
+# define DP_PSR2_SU_GRANULARITY_REQUIRED (1 << 5) /* eDP 1.4b */
/*
* 0x80-0x8f describe downstream port capabilities, but there are two layouts
* based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set. If it was not,
@@ -568,6 +569,16 @@
#define DP_RECEIVER_ALPM_STATUS 0x200b /* eDP 1.4 */
# define DP_ALPM_LOCK_TIMEOUT_ERROR (1 << 0)
+#define DP_DPRX_FEATURE_ENUMERATION_LIST 0x2210 /* DP 1.3 */
+# define DP_GTC_CAP (1 << 0) /* DP 1.3 */
+# define DP_SST_SPLIT_SDP_CAP (1 << 1) /* DP 1.4 */
+# define DP_AV_SYNC_CAP (1 << 2) /* DP 1.3 */
+# define DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED (1 << 3) /* DP 1.3 */
+# define DP_VSC_EXT_VESA_SDP_SUPPORTED (1 << 4) /* DP 1.4 */
+# define DP_VSC_EXT_VESA_SDP_CHAINING_SUPPORTED (1 << 5) /* DP 1.4 */
+# define DP_VSC_EXT_CEA_SDP_SUPPORTED (1 << 6) /* DP 1.4 */
+# define DP_VSC_EXT_CEA_SDP_CHAINING_SUPPORTED (1 << 7) /* DP 1.4 */
+
/* DP 1.2 Sideband message defines */
/* peer device type - DP 1.2a Table 2-92 */
#define DP_PEER_DEVICE_NONE 0x0
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-01-02 11:30 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2016-12-31 2:18 [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format vathsala nagaraju
2017-01-02 8:18 ` Daniel Vetter
[not found] ` <DFCE9515A6E7D340BE366A94B943DE134F88144E@BGSMSX103.gar.corp.intel.com>
2017-01-02 9:17 ` Daniel Vetter
2017-01-02 8:34 ` Jani Nikula
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2017-01-02 11:30 [PATCH 00/10] enable psr2 for idle_screen on y-cordinate panel vathsala nagaraju
2017-01-02 11:30 ` [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format vathsala nagaraju
2016-12-30 5:25 [PATCH 00/10] enable psr2 for idle_screen on y-cordinate panel vathsala nagaraju
2016-12-30 5:25 ` [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format vathsala nagaraju
2016-12-30 19:05 ` Daniel Vetter
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