From: Jani Nikula <jani.nikula@intel.com>
To: "Lee, Shawn C" <shawn.c.lee@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume
Date: Fri, 09 Sep 2016 10:46:56 +0300 [thread overview]
Message-ID: <87eg4tv7kf.fsf@intel.com> (raw)
In-Reply-To: <1473329920-4449-1-git-send-email-shawn.c.lee@intel.com>
On Thu, 08 Sep 2016, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote:
> From: "Lee, Shawn C" <shawn.c.lee@intel.com>
>
> SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity
> (minimum increment) of the PWM backlight control counter. PWM frequency
> adjustment on 128 clock increments when this bit was 1. And 16 clock
> increments when it was 0.
>
> PWM frequency multiple octuple (from 200Hz to 1.6KHz) due to
> SPT_PWM_GRANULARITY was clear to 0 after S3. This patch save
> SOUTH_CHICKEN1 register value before suspend. And will restore
> it after i915 resume.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97486
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
> Reviewed-by: Wei Shun Chen <wei.shun.chang@intel.com>
> Reviewed-by: Gary C Wang <gary.c.wang@intel.com>
> Signed-off-by: Shawn Lee <shawn.c.lee@intel.com>
> ---
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/intel_panel.c | 21 +++++++++++++++++++--
> 2 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 570a7ca..4c28692 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -256,6 +256,7 @@ struct intel_panel {
> u32 level;
> u32 min;
> u32 max;
> + u32 pwm_granularity;
None of the fields here store register information directly. Please
don't do so here either. Make this a bool. Call it
pwm_alternate_increment or something.
> bool enabled;
> bool combination_mode; /* gen 2/4 only */
> bool active_low_pwm;
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index c10e9b0..720fd5a 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -841,7 +841,17 @@ static void lpt_enable_backlight(struct intel_connector *connector)
> {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> struct intel_panel *panel = &connector->panel;
> - u32 pch_ctl1, pch_ctl2;
> + u32 pch_ctl1, pch_ctl2, mul;
> +
> + if (HAS_PCH_LPT(dev_priv)) {
> + mul = I915_READ(SOUTH_CHICKEN2);
> + mul &= ~LPT_PWM_GRANULARITY;
> + I915_WRITE(SOUTH_CHICKEN2, mul | panel->backlight.pwm_granularity);
> + } else {
> + mul = I915_READ(SOUTH_CHICKEN1);
> + mul &= ~SPT_PWM_GRANULARITY;
> + I915_WRITE(SOUTH_CHICKEN1, mul | panel->backlight.pwm_granularity);
> + }
It's probably safer to modify the granularity after we've ensured the
backlight is disabled below.
>
> pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
> if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
> @@ -1413,7 +1423,7 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
> {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> struct intel_panel *panel = &connector->panel;
> - u32 pch_ctl1, pch_ctl2, val;
> + u32 pch_ctl1, pch_ctl2, val, mul;
>
> pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
> panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
> @@ -1421,6 +1431,13 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
> pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
> panel->backlight.max = pch_ctl2 >> 16;
>
> + if (HAS_PCH_LPT(dev_priv))
> + mul = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
> + else
> + mul = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
> +
> + panel->backlight.pwm_granularity = mul;
In the function, there's a sequence of figuring out the max backlight,
please don't put this stuff in the middle of it. You can just make this
the first thing.
As follow-up, you can then use the field in spt_hz_to_pwm and
lpt_hz_to_pwm instead of re-reading the chicken bits there.
> +
> if (!panel->backlight.max)
> panel->backlight.max = get_backlight_max_vbt(connector);
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2016-09-09 7:46 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-08 10:18 [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume Lee, Shawn C
2016-09-08 10:24 ` ✓ Fi.CI.BAT: success for " Patchwork
2016-09-09 7:46 ` Jani Nikula [this message]
2016-09-19 8:53 ` [PATCH v2] " Lee, Shawn C
2016-09-19 8:38 ` Jani Nikula
2016-09-19 8:41 ` Jani Nikula
2016-09-19 10:30 ` kbuild test robot
2016-09-19 10:50 ` kbuild test robot
2016-09-19 9:56 ` [PATCH] " Lee, Shawn C
2016-09-19 9:42 ` Jani Nikula
2016-09-19 10:01 ` Lee, Shawn C
2016-09-19 10:20 ` ✓ Fi.CI.BAT: success for drm/i915 : Restore PWM_GRANULARITY after resume (rev3) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87eg4tv7kf.fsf@intel.com \
--to=jani.nikula@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=shawn.c.lee@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox