From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mika Kuoppala Subject: Re: [PATCH] drm/i915: Do not set L3-LLC Coherency bit in ctx descriptor Date: Tue, 07 Apr 2015 17:03:32 +0300 Message-ID: <87egnwc9xn.fsf@gaia.fi.intel.com> References: <1428411693-27889-1-git-send-email-arun.siluvery@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id F32ED89ACD for ; Tue, 7 Apr 2015 07:03:34 -0700 (PDT) In-Reply-To: <1428411693-27889-1-git-send-email-arun.siluvery@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Arun Siluvery , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org QXJ1biBTaWx1dmVyeSA8YXJ1bi5zaWx1dmVyeUBsaW51eC5pbnRlbC5jb20+IHdyaXRlczoKCj4g QWNjb3JkaW5nIHRvIFNwZWMgdGhpcyBpcyBhIHJlc2VydmVkIGJpdCBmb3IgR2VuOSsgYW5kIHNo b3VsZCBub3QgYmUgc2V0Lgo+Cj4gQ2hhbmdlLUlkOiBJMDIxNWZiNzA1N2I5NDEzOWI3YTJmOTBl Y2M3YTAyMDFjMGM5M2FkNAo+IFNpZ25lZC1vZmYtYnk6IEFydW4gU2lsdXZlcnkgPGFydW4uc2ls dXZlcnlAbGludXguaW50ZWwuY29tPgo+IC0tLQoKUmV2aWV3ZWQtYnk6IE1pa2EgS3VvcHBhbGEg PG1pa2Eua3VvcHBhbGFAaW50ZWwuY29tPgoKPiAgZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxf bHJjLmMgfCAzICsrLQo+ICAxIGZpbGUgY2hhbmdlZCwgMiBpbnNlcnRpb25zKCspLCAxIGRlbGV0 aW9uKC0pCj4KPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfbHJjLmMg Yi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9scmMuYwo+IGluZGV4IDFjMzgzNGZjLi5jZmM3 M2VhIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2xyYy5jCj4gKysr IGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfbHJjLmMKPiBAQCAtMjY1LDcgKzI2NSw4IEBA IHN0YXRpYyB1aW50NjRfdCBleGVjbGlzdHNfY3R4X2Rlc2NyaXB0b3Ioc3RydWN0IGludGVsX2Vu Z2luZV9jcyAqcmluZywKPiAgCj4gIAlkZXNjID0gR0VOOF9DVFhfVkFMSUQ7Cj4gIAlkZXNjIHw9 IExFR0FDWV9DT05URVhUIDw8IEdFTjhfQ1RYX01PREVfU0hJRlQ7Cj4gLQlkZXNjIHw9IEdFTjhf Q1RYX0wzTExDX0NPSEVSRU5UOwo+ICsJaWYgKElTX0dFTjgoY3R4X29iai0+YmFzZS5kZXYpKQo+ ICsJCWRlc2MgfD0gR0VOOF9DVFhfTDNMTENfQ09IRVJFTlQ7Cj4gIAlkZXNjIHw9IEdFTjhfQ1RY X1BSSVZJTEVHRTsKPiAgCWRlc2MgfD0gbHJjYTsKPiAgCWRlc2MgfD0gKHU2NClpbnRlbF9leGVj bGlzdHNfY3R4X2lkKGN0eF9vYmopIDw8IEdFTjhfQ1RYX0lEX1NISUZUOwo+IC0tIAo+IDIuMy4w Cj4KPiBfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwo+IElu dGVsLWdmeCBtYWlsaW5nIGxpc3QKPiBJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCj4g aHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeApf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZngg bWFpbGluZyBsaXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cDovL2xpc3Rz LmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=