From: Jani Nikula <jani.nikula@linux.intel.com>
To: Gaurav K Singh <gaurav.k.singh@intel.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>
Cc: Shobhit Kumar <shobhit.kumar@intel.com>
Subject: Re: [PATCH 1/4] drm/i915: Use DSI Pll1 for enabling MIPI DSI on Port C
Date: Tue, 09 Dec 2014 10:27:25 +0200 [thread overview]
Message-ID: <87egs9jkia.fsf@intel.com> (raw)
In-Reply-To: <1418102820-28093-1-git-send-email-gaurav.k.singh@intel.com>
On Tue, 09 Dec 2014, Gaurav K Singh <gaurav.k.singh@intel.com> wrote:
> DSI Pll1 is used for enabling DSI on Port C.
>
> v2: Addressed review comments of Jani
> - Used & operator instead of == for intel_dsi->ports
>
> Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dsi_pll.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index 8957f10..3622d0b 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -241,9 +241,10 @@ static void vlv_configure_dsi_pll(struct intel_encoder *encoder)
> return;
> }
>
> - dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL;
> + if (intel_dsi->ports & (1 << PORT_A))
> + dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL;
>
> - if (intel_dsi->dual_link)
> + if (intel_dsi->ports & (1 << PORT_C))
> dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL;
>
> DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n",
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
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Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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next prev parent reply other threads:[~2014-12-09 8:27 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-07 10:43 [PATCH 0/4] BYT DSI Enable on Port C Gaurav K Singh
2014-12-07 10:43 ` [PATCH 1/4] drm/i915: Use DSI Pll1 for enabling MIPI DSI " Gaurav K Singh
2014-12-07 11:21 ` [PATCH] " Gaurav K Singh
2014-12-08 11:33 ` Jani Nikula
2014-12-09 5:36 ` Singh, Gaurav K
2014-12-09 0:45 ` shuang.he
2014-12-09 5:27 ` [PATCH 1/4] " Gaurav K Singh
2014-12-09 8:27 ` Jani Nikula [this message]
2014-12-07 10:43 ` [PATCH 2/4] drm/i915: DSI sequence related changes for DSI " Gaurav K Singh
2014-12-09 9:51 ` Singh, Gaurav K
2014-12-09 10:30 ` Jani Nikula
2014-12-09 13:49 ` Singh, Gaurav K
2014-12-10 9:20 ` Daniel Vetter
2014-12-10 9:35 ` Singh, Gaurav K
2014-12-10 16:37 ` [PATCH 2/4] drm/i915: Changes related to the sequence port no for Gaurav K Singh
2014-12-10 17:01 ` Daniel Vetter
2014-12-07 10:43 ` [PATCH 3/4] drm/i915: Enable MIPI PHY transparent latch for DSI Port C Gaurav K Singh
2014-12-09 8:36 ` Jani Nikula
2014-12-07 10:43 ` [PATCH 4/4] drm/i915: Get HW state changes required for DSI port C Gaurav K Singh
2014-12-08 11:37 ` Jani Nikula
2014-12-08 13:13 ` Singh, Gaurav K
2014-12-08 13:31 ` Jani Nikula
2014-12-09 5:29 ` [PATCH 4/4] drm/i915: Software workaround for getting the HW status of DSI Port C on BYT Gaurav K Singh
2014-12-09 8:34 ` Jani Nikula
2014-12-09 9:49 ` Daniel Vetter
2014-12-09 0:41 ` [PATCH 4/4] drm/i915: Get HW state changes required for DSI port C shuang.he
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