From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Damien Lespiau <damien.lespiau@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 53/89] drm/i915/skl: Gen9 Forcewake
Date: Wed, 10 Sep 2014 16:44:36 +0300 [thread overview]
Message-ID: <87egvjh9ob.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <1409830075-11139-54-git-send-email-damien.lespiau@intel.com>
Damien Lespiau <damien.lespiau@intel.com> writes:
> From: Zhe Wang <zhe1.wang@intel.com>
>
> Implement common forcewake functions shared by Gen9 features.
>
> Signed-off-by: Zhe Wang <zhe1.wang@intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 5 +-
> drivers/gpu/drm/i915/i915_reg.h | 6 ++
> drivers/gpu/drm/i915/intel_uncore.c | 175 +++++++++++++++++++++++++++++++++++-
> 3 files changed, 184 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 9b0e398..84defa4 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -535,6 +535,7 @@ struct intel_uncore {
>
> unsigned fw_rendercount;
> unsigned fw_mediacount;
> + unsigned fw_blittercount;
>
> struct timer_list force_wake_timer;
> };
> @@ -2950,7 +2951,9 @@ int vlv_freq_opcode(struct drm_i915_private *dev_priv, int val);
>
> #define FORCEWAKE_RENDER (1 << 0)
> #define FORCEWAKE_MEDIA (1 << 1)
> -#define FORCEWAKE_ALL (FORCEWAKE_RENDER | FORCEWAKE_MEDIA)
> +#define FORCEWAKE_BLITTER (1 << 2)
> +#define FORCEWAKE_ALL (FORCEWAKE_RENDER | FORCEWAKE_MEDIA | \
> + FORCEWAKE_BLITTER)
>
>
> #define I915_READ8(reg) dev_priv->uncore.funcs.mmio_readb(dev_priv, (reg), true)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 414c2a5..417075d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5738,6 +5738,12 @@ enum punit_power_well {
> #define VLV_GTLC_PW_MEDIA_STATUS_MASK (1 << 5)
> #define VLV_GTLC_PW_RENDER_STATUS_MASK (1 << 7)
> #define FORCEWAKE_MT 0xa188 /* multi-threaded */
> +#define FORCEWAKE_MEDIA_GEN9 0xa270
> +#define FORCEWAKE_RENDER_GEN9 0xa278
> +#define FORCEWAKE_BLITTER_GEN9 0xa188
> +#define FORCEWAKE_ACK_MEDIA_GEN9 0x0D88
> +#define FORCEWAKE_ACK_RENDER_GEN9 0x0D84
> +#define FORCEWAKE_ACK_BLITTER_GEN9 0x130044
> #define FORCEWAKE_KERNEL 0x1
> #define FORCEWAKE_USER 0x2
> #define FORCEWAKE_MT_ACK 0x130040
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 3b27fb0..7b7fc9e 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -299,6 +299,154 @@ static void vlv_force_wake_put(struct drm_i915_private *dev_priv, int fw_engine)
> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> +static void __gen9_gt_force_wake_mt_reset(struct drm_i915_private *dev_priv)
> +{
> + __raw_i915_write32(dev_priv, FORCEWAKE_RENDER_GEN9,
> + _MASKED_BIT_DISABLE(0xffff));
> +
> + __raw_i915_write32(dev_priv, FORCEWAKE_MEDIA_GEN9,
> + _MASKED_BIT_DISABLE(0xffff));
> +
> + __raw_i915_write32(dev_priv, FORCEWAKE_BLITTER_GEN9,
> + _MASKED_BIT_DISABLE(0xffff));
> +}
> +
> +static void __gen9_force_wake_get(struct drm_i915_private *dev_priv,
> + int fw_engine)
> +{
> + /* Check for Render Engine */
> + if (FORCEWAKE_RENDER & fw_engine) {
> + if (wait_for_atomic((__raw_i915_read32(dev_priv,
> + FORCEWAKE_ACK_RENDER_GEN9) &
> + FORCEWAKE_KERNEL) == 0,
> + FORCEWAKE_ACK_TIMEOUT_MS))
> + DRM_ERROR("Timed out: Render forcewake old ack to clear.\n");
> +
> + __raw_i915_write32(dev_priv, FORCEWAKE_RENDER_GEN9,
> + _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
> +
> + if (wait_for_atomic((__raw_i915_read32(dev_priv,
> + FORCEWAKE_ACK_RENDER_GEN9) &
> + FORCEWAKE_KERNEL),
> + FORCEWAKE_ACK_TIMEOUT_MS))
> + DRM_ERROR("Timed out: waiting for Render to ack.\n");
> + }
> +
> + /* Check for Media Engine */
> + if (FORCEWAKE_MEDIA & fw_engine) {
> + if (wait_for_atomic((__raw_i915_read32(dev_priv,
> + FORCEWAKE_ACK_MEDIA_GEN9) &
> + FORCEWAKE_KERNEL) == 0,
> + FORCEWAKE_ACK_TIMEOUT_MS))
> + DRM_ERROR("Timed out: Media forcewake old ack to clear.\n");
> +
> + __raw_i915_write32(dev_priv, FORCEWAKE_MEDIA_GEN9,
> + _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
> +
> + if (wait_for_atomic((__raw_i915_read32(dev_priv,
> + FORCEWAKE_ACK_MEDIA_GEN9) &
> + FORCEWAKE_KERNEL),
> + FORCEWAKE_ACK_TIMEOUT_MS))
> + DRM_ERROR("Timed out: waiting for Media to ack.\n");
> + }
> +
> + /* Check for Blitter Engine */
> + if (FORCEWAKE_BLITTER & fw_engine) {
> + if (wait_for_atomic((__raw_i915_read32(dev_priv,
> + FORCEWAKE_ACK_BLITTER_GEN9) &
> + FORCEWAKE_KERNEL) == 0,
> + FORCEWAKE_ACK_TIMEOUT_MS))
> + DRM_ERROR("Timed out: Blitter forcewake old ack to clear.\n");
> +
> + __raw_i915_write32(dev_priv, FORCEWAKE_BLITTER_GEN9,
> + _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
> +
> + if (wait_for_atomic((__raw_i915_read32(dev_priv,
> + FORCEWAKE_ACK_BLITTER_GEN9) &
> + FORCEWAKE_KERNEL),
> + FORCEWAKE_ACK_TIMEOUT_MS))
> + DRM_ERROR("Timed out: waiting for Blitter to ack.\n");
> + }
> +}
> +
> +static void __gen9_force_wake_put(struct drm_i915_private *dev_priv,
> + int fw_engine)
> +{
> + /* Check for Render Engine */
> + if (FORCEWAKE_RENDER & fw_engine)
> + __raw_i915_write32(dev_priv, FORCEWAKE_RENDER_GEN9,
> + _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
> +
> + /* Check for Media Engine */
> + if (FORCEWAKE_MEDIA & fw_engine)
> + __raw_i915_write32(dev_priv, FORCEWAKE_MEDIA_GEN9,
> + _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
> +
> + /* Check for Blitter Engine */
> + if (FORCEWAKE_BLITTER & fw_engine)
> + __raw_i915_write32(dev_priv, FORCEWAKE_BLITTER_GEN9,
> + _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
> +}
> +
> +void gen9_force_wake_get(struct drm_i915_private *dev_priv,
> + int fw_engine)
static missing
> +{
> + unsigned long irqflags;
> +
> + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> +
> + if (FORCEWAKE_RENDER & fw_engine) {
> + if (dev_priv->uncore.fw_rendercount++ == 0)
> + dev_priv->uncore.funcs.force_wake_get(dev_priv,
> + FORCEWAKE_RENDER);
> + }
> +
> + if (FORCEWAKE_MEDIA & fw_engine) {
> + if (dev_priv->uncore.fw_mediacount++ == 0)
> + dev_priv->uncore.funcs.force_wake_get(dev_priv,
> + FORCEWAKE_MEDIA);
> + }
> +
> + if (FORCEWAKE_BLITTER & fw_engine) {
> + if (dev_priv->uncore.fw_blittercount++ == 0)
> + dev_priv->uncore.funcs.force_wake_get(dev_priv,
> + FORCEWAKE_BLITTER);
> + }
> +
> + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> +}
> +
> +void gen9_force_wake_put(struct drm_i915_private *dev_priv,
> + int fw_engine)
static missing
above statics added it is:
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> +{
> + unsigned long irqflags;
> +
> + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> +
> + if (FORCEWAKE_RENDER & fw_engine) {
> + WARN_ON(dev_priv->uncore.fw_rendercount == 0);
> + if (--dev_priv->uncore.fw_rendercount == 0)
> + dev_priv->uncore.funcs.force_wake_put(dev_priv,
> + FORCEWAKE_RENDER);
> + }
> +
> + if (FORCEWAKE_MEDIA & fw_engine) {
> + WARN_ON(dev_priv->uncore.fw_mediacount == 0);
> + if (--dev_priv->uncore.fw_mediacount == 0)
> + dev_priv->uncore.funcs.force_wake_put(dev_priv,
> + FORCEWAKE_MEDIA);
> + }
> +
> + if (FORCEWAKE_BLITTER & fw_engine) {
> + WARN_ON(dev_priv->uncore.fw_blittercount == 0);
> + if (--dev_priv->uncore.fw_blittercount == 0)
> + dev_priv->uncore.funcs.force_wake_put(dev_priv,
> + FORCEWAKE_BLITTER);
> + }
> +
> + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> +}
> +
> static void gen6_force_wake_timer(unsigned long arg)
> {
> struct drm_i915_private *dev_priv = (void *)arg;
> @@ -337,6 +485,9 @@ void intel_uncore_forcewake_reset(struct drm_device *dev, bool restore)
> if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev) || IS_BROADWELL(dev))
> __gen7_gt_force_wake_mt_reset(dev_priv);
>
> + if (IS_GEN9(dev))
> + __gen9_gt_force_wake_mt_reset(dev_priv);
> +
> if (restore) { /* If reset with a user forcewake, try to restore */
> unsigned fw = 0;
>
> @@ -346,6 +497,15 @@ void intel_uncore_forcewake_reset(struct drm_device *dev, bool restore)
>
> if (dev_priv->uncore.fw_mediacount)
> fw |= FORCEWAKE_MEDIA;
> + } else if (IS_GEN9(dev)) {
> + if (dev_priv->uncore.fw_rendercount)
> + fw |= FORCEWAKE_RENDER;
> +
> + if (dev_priv->uncore.fw_mediacount)
> + fw |= FORCEWAKE_MEDIA;
> +
> + if (dev_priv->uncore.fw_blittercount)
> + fw |= FORCEWAKE_BLITTER;
> } else {
> if (dev_priv->uncore.forcewake_count)
> fw = FORCEWAKE_ALL;
> @@ -410,6 +570,10 @@ void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv, int fw_engine)
>
> intel_runtime_pm_get(dev_priv);
>
> + /* Redirect to Gen9 specific routine */
> + if (IS_GEN9(dev_priv->dev))
> + return gen9_force_wake_get(dev_priv, fw_engine);
> +
> /* Redirect to VLV specific routine */
> if (IS_VALLEYVIEW(dev_priv->dev))
> return vlv_force_wake_get(dev_priv, fw_engine);
> @@ -431,6 +595,12 @@ void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv, int fw_engine)
> if (!dev_priv->uncore.funcs.force_wake_put)
> return;
>
> + /* Redirect to Gen9 specific routine */
> + if (IS_GEN9(dev_priv->dev)) {
> + gen9_force_wake_put(dev_priv, fw_engine);
> + goto out;
> + }
> +
> /* Redirect to VLV specific routine */
> if (IS_VALLEYVIEW(dev_priv->dev)) {
> vlv_force_wake_put(dev_priv, fw_engine);
> @@ -835,7 +1005,10 @@ void intel_uncore_init(struct drm_device *dev)
>
> intel_uncore_early_sanitize(dev, false);
>
> - if (IS_VALLEYVIEW(dev)) {
> + if (IS_GEN9(dev)) {
> + dev_priv->uncore.funcs.force_wake_get = __gen9_force_wake_get;
> + dev_priv->uncore.funcs.force_wake_put = __gen9_force_wake_put;
> + } else if (IS_VALLEYVIEW(dev)) {
> dev_priv->uncore.funcs.force_wake_get = __vlv_force_wake_get;
> dev_priv->uncore.funcs.force_wake_put = __vlv_force_wake_put;
> } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2014-09-10 13:44 UTC|newest]
Thread overview: 286+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-04 11:26 [PATCH 00/89] Basic Skylake enabling Damien Lespiau
2014-09-04 11:26 ` [PATCH 01/89] drm/i915/skl: Add the Skylake PCI ids Damien Lespiau
2014-09-04 11:26 ` [PATCH 02/89] drm/i915/skl: Add an IS_GEN9() define Damien Lespiau
2014-09-04 11:26 ` [PATCH 03/89] drm/i915/skl: Add an IS_SKYLAKE macro Damien Lespiau
2014-09-04 11:26 ` [PATCH 04/89] drm/i915/skl: SKL FBC enablement Damien Lespiau
2014-09-04 11:26 ` [PATCH 05/89] drm/i915/skl: i915_swizzle_info gen9 fix Damien Lespiau
2014-09-04 13:14 ` Daniel Vetter
2014-09-04 15:26 ` Damien Lespiau
2014-09-04 11:26 ` [PATCH 06/89] drm/i915/skl: Fence registers on SKL are the same as SNB Damien Lespiau
2014-09-04 11:26 ` [PATCH 07/89] drm/i915/skl: Provide a placeholder for init_clock_gating() Damien Lespiau
2014-09-04 11:26 ` [PATCH 08/89] drm/i915/skl: Use gen8_ring_dispatch_execbuffer() on GEN9 Damien Lespiau
2014-09-16 14:53 ` Thomas Wood
2014-09-19 11:09 ` Damien Lespiau
2014-09-04 11:26 ` [PATCH 09/89] drm/i915/skl: Skylake shares the interrupt logic with Broadwell Damien Lespiau
2014-09-04 11:26 ` [PATCH 10/89] drm/i915/skl: don't set the AsyncFlip performance mode for Gen9+ Damien Lespiau
2014-09-04 11:26 ` [PATCH 11/89] drm/i915/skl: Framebuffers need to be aligned to 256Kb on Skylake Damien Lespiau
2014-09-16 14:54 ` Thomas Wood
2014-09-19 11:26 ` [PATCH 11/89 v2] drm/i915/skl: Framebuffers need to be aligned to 256KB " Damien Lespiau
2014-09-19 13:46 ` Thomas Wood
2014-09-04 11:26 ` [PATCH 12/89] drm/i915/skl: Implement thew new update_plane() for primary planes Damien Lespiau
2014-09-17 0:49 ` Rodrigo Vivi
2014-09-22 11:18 ` [PATCH 12/89 v8] drm/i915/skl: Implement the " Damien Lespiau
2014-09-04 11:26 ` [PATCH 13/89] drm/i915/skl: Don't create a VGA connector on Skylake Damien Lespiau
2014-09-04 11:26 ` [PATCH 14/89] drm/i915/skl: Don't try to read out the PCH transcoder state if not present Damien Lespiau
2014-09-04 11:26 ` [PATCH 15/89] drm/i915/skl: Program the DDI buffer translation tables Damien Lespiau
2014-09-04 18:58 ` [PATCH 15/89 v7] " Damien Lespiau
2014-09-04 11:26 ` [PATCH 16/89] drm/i915/skl: Add support for DP voltage swings and pre-emphasis Damien Lespiau
2014-09-04 11:26 ` [PATCH 17/89] drm/i915/skl: Skylake doesn't need the DP AUX clock divider programmed Damien Lespiau
2014-09-04 11:26 ` [PATCH 18/89] drm/i915/skl: Skylake moves AUX_CTL from PCH to CPU Damien Lespiau
2014-09-04 11:26 ` [PATCH 19/89] drm/i915/skl: Add the additional graphics stolen sizes Damien Lespiau
2014-09-04 11:26 ` [PATCH 20/89] drm/i915/skl: gen9 uses the same bind_vma() vfuncs as gen6+ Damien Lespiau
2014-09-04 11:26 ` [PATCH 21/89] drm/i915/skl: Implement the get_aux_clock_divider() DP vfunc Damien Lespiau
2014-09-17 1:12 ` Rodrigo Vivi
2014-09-22 13:21 ` Damien Lespiau
2014-09-22 19:33 ` Rodrigo Vivi
2014-09-04 11:26 ` [PATCH 22/89] drm/i915/skl: Provide a get_aux_send_ctl() vfunc for skylake Damien Lespiau
2014-09-17 1:16 ` Rodrigo Vivi
2014-09-04 11:26 ` [PATCH 23/89] drm/i915/skl: Initialize PPGTT like gen8 Damien Lespiau
2014-09-17 1:17 ` Rodrigo Vivi
2014-09-04 11:26 ` [PATCH 24/89] drm/i915/skl: Allow the reg_read ioctl to return RCS_TIMESTAMP Damien Lespiau
2014-09-17 1:27 ` Rodrigo Vivi
2014-09-22 13:27 ` Damien Lespiau
2014-09-04 11:26 ` [PATCH 25/89] drm/i915/skl: report the same INSTDONE registers as gen8 Damien Lespiau
2014-09-17 1:28 ` Rodrigo Vivi
2014-09-04 11:26 ` [PATCH 26/89] drm/i915/skl: Report the PDP regs as in gen8 Damien Lespiau
2014-09-17 1:33 ` Rodrigo Vivi
2014-09-04 11:26 ` [PATCH 27/89] drm/i915/skl: SKL shares the same underrun interrupt as BDW Damien Lespiau
2014-09-17 1:39 ` Rodrigo Vivi
2014-09-04 11:26 ` [PATCH 28/89] drm/i915/skl: SKL pipe misc programming Damien Lespiau
2014-09-17 1:43 ` Rodrigo Vivi
2014-09-04 11:26 ` [PATCH 29/89] drm/i915/skl: vfuncs for skl eld and global resource Damien Lespiau
2014-09-17 1:50 ` Rodrigo Vivi
2014-09-22 13:32 ` Damien Lespiau
2014-09-04 11:26 ` [PATCH 30/89] drm/i915/skl: SKL backlight enabling Damien Lespiau
2014-09-17 1:56 ` Rodrigo Vivi
2014-09-17 9:09 ` Jani Nikula
2014-09-17 13:46 ` Rodrigo Vivi
2014-09-17 14:56 ` Rodrigo Vivi
2014-09-04 11:26 ` [PATCH 31/89] drm/i915/skl: Restore pipe B/C interrupts Damien Lespiau
2014-09-04 11:26 ` [PATCH 32/89] drm/i915/skl: Adjust the display engine interrupts Damien Lespiau
2014-09-04 13:19 ` Daniel Vetter
2014-09-17 18:41 ` Rodrigo Vivi
2014-09-22 13:38 ` Damien Lespiau
2014-09-04 11:26 ` [PATCH 33/89] drm/i915/skl: Sunrise Point PCH detection Damien Lespiau
2014-09-17 22:18 ` Rodrigo Vivi
2014-09-22 13:42 ` Damien Lespiau
2014-09-22 19:34 ` Rodrigo Vivi
2014-09-04 11:27 ` [PATCH 34/89] drm/i915/skl: Implement WaDisableSDEUnitClockGating:skl Damien Lespiau
2014-09-17 18:48 ` Rodrigo Vivi
2014-09-04 11:27 ` [PATCH 35/89] drm/i915/skl: Implement Wa4x4STCOptimizationDisable:skl Damien Lespiau
2014-09-17 19:00 ` Rodrigo Vivi
2014-09-17 19:00 ` Rodrigo Vivi
2014-09-22 13:49 ` Damien Lespiau
2014-09-04 11:27 ` [PATCH 36/89] drm/i915/skl: Implement WaDisableDgMirrorFixInHalfSliceChicken5:skl Damien Lespiau
2014-09-17 21:22 ` Rodrigo Vivi
2014-09-04 11:27 ` [PATCH 37/89] drm/i915/skl: Skylake has 2 "sprite" planes per pipe Damien Lespiau
2014-09-17 21:25 ` Rodrigo Vivi
2014-09-04 11:27 ` [PATCH 38/89] drm/i915/skl: Implement drm_plane vfuncs Damien Lespiau
2014-09-04 13:21 ` Daniel Vetter
2014-09-16 13:20 ` Damien Lespiau
2014-09-17 22:08 ` Rodrigo Vivi
2014-09-04 11:27 ` [PATCH 39/89] drm/i915/skl: Adjust assert_sprites_disabled() Damien Lespiau
2014-09-17 22:10 ` Rodrigo Vivi
2014-09-04 11:27 ` [PATCH 40/89] drm/i915/skl: Introduce a I915_MAX_PLANES macro Damien Lespiau
2014-09-17 22:12 ` Rodrigo Vivi
2014-09-04 11:27 ` [PATCH 41/89] drm/i915/skl: Introduce intel_num_planes() Damien Lespiau
2014-09-17 22:13 ` Rodrigo Vivi
2014-09-04 11:27 ` [PATCH 42/89] drm/i915/skl: Move gen9 pm initialization into its own branch Damien Lespiau
2014-09-17 22:16 ` Rodrigo Vivi
2014-09-04 11:27 ` [PATCH 43/89] drm/i915/skl: Read the Memory Latency Values for WM computation Damien Lespiau
2014-09-04 18:49 ` [PATCH 43/89 v6] " Damien Lespiau
2014-09-10 17:37 ` Ville Syrjälä
2014-09-05 8:25 ` [PATCH 43/89] " Ville Syrjälä
2014-09-05 8:29 ` Damien Lespiau
2014-09-05 8:42 ` Ville Syrjälä
2014-09-05 12:56 ` Damien Lespiau
2014-09-04 11:27 ` [PATCH 44/89] drm/i915/skl: Register definitions and macros for SKL Watermark regs Damien Lespiau
2014-09-10 18:04 ` Ville Syrjälä
2014-09-16 14:11 ` Damien Lespiau
2014-09-17 13:40 ` [PATCH 44/89 v4] " Damien Lespiau
2014-09-23 11:17 ` [PATCH 44/89 v5] " Damien Lespiau
2014-09-04 11:27 ` [PATCH 45/89] drm/i915/skl: Definition of SKL WM param structs for pipe/plane Damien Lespiau
2014-09-10 18:39 ` Ville Syrjälä
2014-09-17 13:59 ` Damien Lespiau
2014-09-17 15:59 ` Daniel Vetter
2014-09-22 14:00 ` Damien Lespiau
2014-09-22 14:06 ` Ville Syrjälä
2014-09-22 14:21 ` Damien Lespiau
2014-09-23 8:16 ` Daniel Vetter
2014-09-23 15:10 ` [PATCH 45/89 v4] " Damien Lespiau
2014-10-28 15:11 ` Ville Syrjälä
2014-09-04 11:27 ` [PATCH 46/89] drm/i915/skl: Add DDB allocation management structures Damien Lespiau
2014-09-17 10:47 ` Ville Syrjälä
2014-09-22 14:08 ` Damien Lespiau
2014-09-22 18:26 ` Ville Syrjälä
2014-10-29 15:32 ` Ville Syrjälä
2014-09-04 11:27 ` [PATCH 47/89] drm/i915/skl: SKL Watermark Computation Damien Lespiau
2014-09-17 12:07 ` Ville Syrjälä
2014-09-22 22:36 ` Damien Lespiau
2014-09-23 6:00 ` Satheeshakrishna M
2014-09-23 11:13 ` [PATCH 47/89 v11] " Damien Lespiau
2014-10-29 17:07 ` Ville Syrjälä
2014-09-23 11:14 ` [PATCH 47/89] " Damien Lespiau
2014-09-04 11:27 ` [PATCH 48/89] drm/i915/skl: Allocate DDB portions for display planes Damien Lespiau
2014-09-19 9:58 ` Ville Syrjälä
2014-09-27 14:15 ` [PATCH 48/89 v6] " Damien Lespiau
2014-10-29 17:12 ` Ville Syrjälä
2014-09-23 11:19 ` [PATCH 48/89 v4] " Damien Lespiau
2014-09-04 11:27 ` [PATCH 49/89] drm/i915/skl: Program the DDB allocation Damien Lespiau
2014-09-19 10:03 ` Ville Syrjälä
2014-09-27 14:17 ` Damien Lespiau
2014-10-29 18:42 ` Ville Syrjälä
2014-09-04 11:27 ` [PATCH 50/89] drm/i915/skl: Read the pipe WM HW state Damien Lespiau
2014-10-29 19:02 ` Ville Syrjälä
2014-10-30 12:03 ` Damien Lespiau
2014-09-04 11:27 ` [PATCH 51/89] drm/i915/gen9: Add 2us read latency to WM level Damien Lespiau
2014-09-19 10:04 ` Ville Syrjälä
2014-09-04 11:27 ` [PATCH 52/89] drm/i915/gen9: Disable WM if corresponding latency is 0 Damien Lespiau
2014-09-19 10:05 ` Ville Syrjälä
2014-09-24 14:06 ` Damien Lespiau
2014-10-29 19:05 ` Ville Syrjälä
2014-09-04 11:27 ` [PATCH 53/89] drm/i915/skl: Gen9 Forcewake Damien Lespiau
2014-09-10 13:44 ` Mika Kuoppala [this message]
2014-09-16 13:49 ` [PATCH 53/89 v2] " Damien Lespiau
2014-09-04 11:27 ` [PATCH 54/89] drm/i915/skl: Enable Gen9 RC6 Damien Lespiau
2014-09-22 13:15 ` Mika Kuoppala
2014-09-24 17:58 ` Bob Wang
2014-09-04 11:27 ` [PATCH 55/89] drm/i915/skl: Gen9 multi-engine forcewake Damien Lespiau
2014-09-22 15:11 ` Mika Kuoppala
2014-09-24 18:08 ` Bob Wang
2014-09-25 7:32 ` Mika Kuoppala
2014-11-03 17:09 ` [PATCH 55/59 v4] " Damien Lespiau
2014-11-19 13:25 ` Mika Kuoppala
2014-09-04 11:27 ` [PATCH 56/89] drm/i915: Gen9 shadowed registers Damien Lespiau
2014-09-24 13:36 ` Mika Kuoppala
2014-09-24 18:16 ` Bob Wang
2014-09-25 8:58 ` Mika Kuoppala
2014-11-03 17:45 ` [PATCH 56/89 v4] " Damien Lespiau
2014-11-19 13:25 ` Mika Kuoppala
2014-09-04 11:27 ` [PATCH 57/89] drm/i915: Rewrite ABS_DIFF() in a safer manner Damien Lespiau
2014-09-04 12:11 ` Jani Nikula
2014-09-04 12:32 ` Damien Lespiau
2014-09-04 13:11 ` Daniel Vetter
2014-09-04 11:27 ` [PATCH 58/89] drm/i915/skl: Register definitions for SKL Clocks Damien Lespiau
2014-09-22 18:17 ` Paulo Zanoni
2014-10-01 10:51 ` M, Satheeshakrishna
2014-11-04 16:11 ` [PATCH 58/89 v5] " Damien Lespiau
2014-09-04 11:27 ` [PATCH 59/89] drm/i915/skl: Structure/enum definitions for SKL clocks Damien Lespiau
2014-09-22 18:25 ` Paulo Zanoni
2014-11-04 16:12 ` Damien Lespiau
2014-11-05 9:11 ` Daniel Vetter
2014-09-04 11:27 ` [PATCH 60/89] drm/i915/skl: CD clock back calculation for SKL Damien Lespiau
2014-09-22 19:19 ` Paulo Zanoni
2014-10-01 10:51 ` M, Satheeshakrishna
2014-11-04 16:15 ` [PATCH 60/89 v5] " Damien Lespiau
2014-09-04 11:27 ` [PATCH 61/89] drm/i915/skl: Determine enabled PLL and its linkrate/pixel clock Damien Lespiau
2014-09-22 20:12 ` Paulo Zanoni
2014-10-01 10:51 ` M, Satheeshakrishna
2014-10-03 18:25 ` Paulo Zanoni
2014-11-04 16:17 ` [PATCH 61/89 v4] " Damien Lespiau
2014-09-04 11:27 ` [PATCH 62/89] drm/i915/skl: Query DPLL attached to port on SKL Damien Lespiau
2014-09-22 20:24 ` Paulo Zanoni
2014-10-01 10:51 ` M, Satheeshakrishna
2014-11-04 16:19 ` [PATCH 62/89 v3] " Damien Lespiau
2014-09-04 11:27 ` [PATCH 63/89] drm/i915/skl: Define shared DPLLs for Skylake Damien Lespiau
2014-09-23 14:28 ` Paulo Zanoni
2014-10-01 10:52 ` M, Satheeshakrishna
2014-09-04 11:27 ` [PATCH 64/89] drm/i915/skl: Adjust the port PLL selection code Damien Lespiau
2014-09-23 14:39 ` Paulo Zanoni
2014-09-04 11:27 ` [PATCH 65/89] drm/i915/skl: Always use DPLL0 for eDP Damien Lespiau
2014-09-23 15:07 ` Paulo Zanoni
2014-10-01 10:52 ` M, Satheeshakrishna
2014-09-04 11:27 ` [PATCH 66/89] drm/i915/skl: Implementation of SKL DPLL programming Damien Lespiau
2014-09-23 18:05 ` Paulo Zanoni
2014-10-01 10:52 ` M, Satheeshakrishna
2014-11-04 16:26 ` [PATCH 66/89 v9] " Damien Lespiau
2014-11-07 19:56 ` Paulo Zanoni
2015-05-13 14:54 ` [PATCH 66/89] " Tvrtko Ursulin
2015-05-13 15:31 ` Damien Lespiau
2014-09-04 11:27 ` [PATCH 67/89] drm/i915/skl: Provide skl-specific pll hw state cross-checking Damien Lespiau
2014-09-23 18:07 ` Paulo Zanoni
2014-09-04 11:27 ` [PATCH 68/89] drm/i915/skl: Apply eDP WA only for gen < 9 Damien Lespiau
2014-09-23 18:11 ` Paulo Zanoni
2014-09-04 11:27 ` [PATCH 69/89] drm/i915/skl: Adding power domains for AUX controllers Damien Lespiau
2014-09-16 12:35 ` Imre Deak
2014-09-18 13:56 ` Damien Lespiau
2014-09-18 14:23 ` Imre Deak
2014-09-18 14:29 ` Ville Syrjälä
2014-11-05 14:23 ` [PATCH 69/89 v5] " Damien Lespiau
2014-09-04 11:27 ` [PATCH 70/89] drm/i915/skl: Register definition for SKL power well Damien Lespiau
2014-09-16 12:43 ` Imre Deak
2014-09-04 11:27 ` [PATCH 71/89] drm/i915/skl: Implementation of SKL display power well support Damien Lespiau
2014-09-16 13:56 ` Imre Deak
2014-09-16 14:19 ` Imre Deak
2014-09-04 11:27 ` [PATCH 72/89] drm/i915/skl: Enable/disable power well for aux transaction Damien Lespiau
2014-09-16 13:19 ` Imre Deak
2014-09-16 16:13 ` Daniel Vetter
2014-11-07 12:08 ` Damien Lespiau
2014-11-10 19:21 ` Imre Deak
2014-11-11 12:22 ` Damien Lespiau
2014-11-11 13:11 ` Imre Deak
2014-11-11 14:43 ` Daniel Vetter
2014-11-11 14:41 ` Daniel Vetter
2014-11-07 13:11 ` Damien Lespiau
2014-11-07 13:31 ` Ville Syrjälä
2014-11-07 13:49 ` Damien Lespiau
2014-11-07 14:05 ` Ville Syrjälä
2014-09-04 11:27 ` [PATCH 73/89] drm/i915/skl: Enabling MISC IO power well Damien Lespiau
2014-09-16 14:12 ` Imre Deak
2014-09-04 11:27 ` [PATCH 74/89] drm/i915/skl: Implement queue_flip Damien Lespiau
2014-09-23 20:06 ` Paulo Zanoni
2014-09-29 16:54 ` Damien Lespiau
2014-09-29 17:13 ` [PATCH 74/89 v4] " Damien Lespiau
2014-09-30 12:08 ` Paulo Zanoni
2014-09-30 12:19 ` Damien Lespiau
2014-09-04 11:27 ` [PATCH 75/89] drm/i915/skl: fetch, enable/disable pfit as needed Damien Lespiau
2014-09-23 20:50 ` Paulo Zanoni
2014-09-24 10:44 ` Damien Lespiau
2014-09-25 14:48 ` Jesse Barnes
2014-09-25 14:55 ` Damien Lespiau
2014-09-25 17:58 ` [PATCH] drm/i915/skl: fetch, enable/disable pfit as needed v2 Jesse Barnes
2014-09-25 18:06 ` Paulo Zanoni
2014-09-29 13:51 ` Damien Lespiau
2014-09-04 11:27 ` [PATCH 76/89] drm/i915/skl: Store the new WM state at the very end of the update Damien Lespiau
2014-10-29 19:19 ` Ville Syrjälä
2014-09-04 11:27 ` [PATCH 77/89] drm/i915: Introduce a for_each_plane() macro Damien Lespiau
2014-09-04 13:26 ` Daniel Vetter
2014-09-04 13:32 ` Chris Wilson
2014-09-04 14:00 ` Daniel Vetter
2014-09-04 14:05 ` Damien Lespiau
2014-09-04 14:16 ` Daniel Vetter
2014-09-04 14:02 ` Damien Lespiau
2014-09-04 11:27 ` [PATCH 78/89] drm/i915/skl: Flush the WM configuration Damien Lespiau
2014-09-19 10:46 ` Ville Syrjälä
2014-09-04 11:27 ` [PATCH 79/89] drm/i915/skl: Read back the DDB allocation hw state Damien Lespiau
2014-09-19 10:54 ` Ville Syrjälä
2014-09-04 11:27 ` [PATCH 80/89] drm/i915/skl: Augment the latency debugfs files for SKL Damien Lespiau
2014-09-19 10:53 ` Ville Syrjälä
2014-09-29 13:37 ` [PATCH 80/89 v2] " Damien Lespiau
2014-09-04 11:27 ` [PATCH 81/89] drm/i915/skl: Expose skl_ddb_get_hw_state() Damien Lespiau
2014-10-29 19:21 ` Ville Syrjälä
2014-10-29 23:49 ` Damien Lespiau
2014-09-04 11:27 ` [PATCH 82/89] drm/i915/skl: Add a debugfs file to dump the DDB allocation Damien Lespiau
2014-10-29 19:23 ` Ville Syrjälä
2014-09-04 11:27 ` [PATCH 83/89] drm/i915/skl: Check the DDB state at modeset Damien Lespiau
2014-09-04 13:27 ` Daniel Vetter
2014-10-29 19:16 ` Ville Syrjälä
2014-09-04 11:27 ` [PATCH 84/89] drm/i915/skl: add turbo support Damien Lespiau
2014-09-26 14:55 ` Mika Kuoppala
2014-09-04 11:27 ` [PATCH 85/89] drm/i915/skl: Retrieve the frequency limits Damien Lespiau
2014-09-26 15:09 ` Mika Kuoppala
2014-09-04 11:27 ` [PATCH 86/89] drm/i915: only reset media, blt, and render engines on GPU hangs Damien Lespiau
2014-09-04 12:03 ` Jani Nikula
2014-09-04 12:29 ` Damien Lespiau
2014-09-04 13:13 ` Daniel Vetter
2014-09-04 15:46 ` Jesse Barnes
2014-09-04 12:36 ` Mika Kuoppala
2014-09-04 11:27 ` [PATCH 87/89] drm/i915/skl: AUX irqs have moved Damien Lespiau
2014-09-26 15:21 ` Mika Kuoppala
2014-09-04 11:27 ` [PATCH 88/89] drm/i915/skl: Add Gen9 LRC size Damien Lespiau
2014-09-04 11:27 ` [PATCH 89/89] drm/i915/skl: Disable contexts if execlists aren't enabled Damien Lespiau
2014-09-26 15:28 ` Mika Kuoppala
2014-09-26 15:47 ` Chris Wilson
2014-09-04 14:16 ` [PATCH 00/89] Basic Skylake enabling (reviewers) Damien Lespiau
2014-09-16 14:51 ` Thomas Wood
2014-10-17 14:29 ` Damien Lespiau
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